MAX8598ETE+ Maxim Integrated Products, MAX8598ETE+ Datasheet - Page 21
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MAX8598ETE+
Manufacturer Part Number
MAX8598ETE+
Description
IC CNTRLR STP DWN LDO 16-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX8597ETP.pdf
(24 pages)
Specifications of MAX8598ETE+
Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
1.4MHz
Duty Cycle
99.5%
Voltage - Supply
4.5 V ~ 28 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TQFN Exposed Pad
Frequency-max
1.4MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Case 2: Crossover frequency is greater than the
output-capacitor ESR zero (f
The modulator gain at f
Since the output-capacitor ESR-zero frequency is high-
er than the LC double-pole frequency but lower than
the closed-loop crossover frequency, where the modu-
lator already has -1 slope, the error-amplifier gain must
have zero slope at f
desired -1 slope.
The error-amplifier circuit configuration is the same as
case 1 above; however, the closed-loop crossover fre-
quency is now between f
Figure 8.
The equations that define the error amplifier’s zeros
(f
same as case 1; however, f
closed-loop crossover frequency. Therefore, the error-
amplifier gain between f
lated as:
This gain is set by the ratio of R4/R1, where R1 is calcu-
lated as illustrated in the Setting the Output Voltage
section. Thus:
where f
Similar to case 1, C2 is calculated as:
Figure 6. Type III Compensation Network
Z1_EA
G EA(f
G
MOD(FC)
Z1_EA
REF
Z2_EA
, f
R4 = R1 x f
MAX8597
MAX8598
MAX8599
- f
Z2_EA
Z2_EA
= f
) = G EA(FC) x f Z2_EA / f P2_EA = f Z2_EA / (f P2_EA x G MOD(FC) )
= G
C2 = 2 / (π x R4 x f
COMP
) and poles (f
P_LC
______________________________________________________________________________________
FB
MOD(DC)
Z2_EA
C
and f
C
so the loop crosses over at the
Z1_EA
is:
C3
/ (f
C2
P2_EA
P2
x (f
P2_EA
P2_EA
C
and f
and f
P_LC
P2_EA
R4
> f
= f
L
C1
is now lower than the
P_LC
R3
Low-Dropout, Wide-Input-Voltage,
Z_ESR
x G
)
P3
Z2_EA
Z_ESR
2
, f
/ (f
MOD(FC)
)
as illustrated in
P3_EA
Z_ESR
).
.
is now calcu-
R1
R2
) are the
)
x f
C
)
C
O
Set the error-amplifier third pole, f
switching frequency, and let RM = (R1 x R3) / (R1 +
R3). The gain of the error amplifier between f
f
G
Similar to case 1, R3, C1, and C3 are calculated as:
Figure 7. Closed-Loop and Error-Amplifier Gain Plot for Case 1
Figure 8. Closed-Loop and Error-Amplifier Gain Plot for Case 2
P3_EA
Step-Down Controllers
EA(FC)
GAIN
GAIN
(dB)
(dB)
0
0
is set by the ratio of R4/RM and is equal to
= 1 / G
C3 = C2 / ((2π x C2 x R4 x f
f
f
Z1
Z1
CLOSED-LOOP GAIN
C1 = 1 / (2π x R3 x f
R3 = R1 x RM / (R1 - RM)
MOD(FC)
f
f
Z2
RM = R4 x G
Z2
CLOSED-LOOP GAIN
. Then:
f
P2
f
C
MOD(FC)
f
f
C
P2
Z
f
_ESR)
P3
P3_EA
P3_EA
f
P3
) - 1)
, at half the
EA GAIN
EA GAIN
P2_EA
FREQUENCY
FREQUENCY
and
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