MAX5015CSA+T Maxim Integrated Products, MAX5015CSA+T Datasheet - Page 8
![IC CNTRLR PWM CRNT MD 8-SOIC](/photos/1/39/13902/8-soic_21-0042b_sml.jpg)
MAX5015CSA+T
Manufacturer Part Number
MAX5015CSA+T
Description
IC CNTRLR PWM CRNT MD 8-SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX5015ESA.pdf
(14 pages)
Specifications of MAX5015CSA+T
Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
275kHz
Duty Cycle
50%
Voltage - Supply
18 V ~ 110 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
275kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current-Mode PWM Controllers with Integrated
Startup Circuit for Isolated Power Supplies
Figure 2. Forward Converter
Isolated voltage feedback is achieved by using an opto-
coupler and a shunt regulator as shown in Figure 2. The
output voltage set point accuracy is a function of the
accuracy of the shunt regulator and feedback resistor-
divider tolerance.
The internal regulators of the MAX5014/MAX5015
enable initial startup without a lossy startup resistor and
regulate the voltage at the output of a tertiary (bias)
winding to provide power for the IC. At startup V+ is
8
_______________________________________________________________________________________
(36V TO 72V)
0.1µF
47µF
C
V
C
DD
IN
SS
1N4148
Optocoupled Feedback
V
SS_SHDN
DD
Internal Regulators
MAX5015
6
N
T
V+
NDRV
OPTO
GND
V
CS
CC
3kΩ
14
CMHD2003
N
IRF640N
R
100Ω
C
3 × 0.47µF
4.75kΩ
M1
IN
240kΩ
N
14
P
OPTOCOUPLER
250VAC
4.7nF
10µF
R
100mΩ
C
SENSE
regulated down to V
The V
tertiary winding to V
tiary winding to only have a small filter capacitor at its
output thus eliminating the additional cost of a filter
inductor.
When designing the tertiary winding calculate the num-
ber of turns so the minimum reflected voltage is always
higher than 12.7V. The maximum reflected voltage
must be less than 36V.
CC
20Ω
N
5
S
DD
1nF
TLV431
SBL204OCT
regulator then regulates from the output of the
220Ω
0.1µF
3 × 560µF
4.7µH
L1
C
CC
OUT
CC
R
25.5kΩ
R
8.25kΩ
. This architecture allows the ter-
1
2
to provide bias for the device.
0.1µF
V
OUT
5V/10A