MAX5020ESA+T Maxim Integrated Products, MAX5020ESA+T Datasheet - Page 8

• Manufacturer Part Number: MAX5020ESA+T
• Description: IC CNTRLR PWM CRNT MD 8-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of MAX5020ESA+T

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 302kHz
• Duty Cycle: 50%
• Voltage - Supply: 13 V ~ 110 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 302kHz
• Duty Cycle (max): 50 %
• Output Current: 1000 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 275 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Synchronous Pin: No
• Topology: Flyback, Forward
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

vantage to this is that the MOSFET voltage rating must
be higher and that slope compensation must be provid-
ed to stabilize the inner current loop. The MAX5019
provides internal slope compensation.
The internal regulators of the MAX5019/MAX5020
enable initial startup without a lossy startup resistor and
regulate the voltage at the output of a tertiary (bias)
winding to provide power for the IC. At startup V+ is
regulated down to V
The V
tertiary winding to V
tiary winding to only have a small filter capacitor at its
output thus eliminating the additional cost of a filter
inductor.
When designing the tertiary winding calculate the num-
ber of turns so the minimum reflected voltage is always
higher than 12.7V. The maximum reflected voltage
must be less than 36V.
To reduce power dissipation the high-voltage regulator
is disabled when the V
greatly reduces power dissipation and improves effi-
ciency. If V
threshold (V
Current-Mode PWM Controllers with Integrated
Startup Circuit
8
Figure 2. Forward Converter
_______________________________________________________________________________________
DD
V
(36V TO 72V)
regulator then regulates from the output of the
IN
CC
CC
= 6.6V), the low-voltage regulator is dis-
falls below the undervoltage lockout
CC
CC
. This architecture allows the ter-
DD
to provide bias for the device.
4.7µF
0.1µF
10µF
C
C
C
voltage reaches 12.7V. This
DD
CC
SS
Internal Regulators
SS_SHDN
V
V
DD
CC
1N4148
MAX5020
6
N
T
NDRV
GND
CS
FB
V+
14
CMHD2003
N
IRF640N
R
abled, and soft-start is reinitiated. In undervoltage lock-
out the MOSFET driver output (NDRV) is held low.
If the input voltage range is between 13V and 36V, V+
and V
ed that the maximum power dissipation is not exceed-
ed. This eliminates the need for a tertiary winding.
The soft-start feature of the MAX5019/MAX5020 allows
the load voltage to ramp up in a controlled manner,
thus eliminating output voltage overshoot.
While the part is in UVLO, the capacitor connected to
the SS_SHDN pin is discharged. Upon coming out of
UVLO an internal current source starts charging the
capacitor to initiate the soft-start cycle. Use the follow-
ing equation to calculate total soft-start time:
where C
Operation begins when V
When soft-start has completed, V
C
3
0.47µF
IN
100Ω
M1
✕
Undervoltage Lockout (UVLO), Soft-Start,
N
14
DD
P
SS
R
100mΩ
may be connected to the line voltage provid-
SENSE
is the soft-start capacitor as shown in Figure 2.
N
5
S
t
20Ω
startup
SBL204OCT
1nF
C
(OPTIONAL)
FB
=
0 45
.
SS_SHDN
4.7µH
L1
ms
nF
×
C
SS_SHDN
R
2kΩ
R
2kΩ
ss
1
2
ramps above 0.6V.
and Shutdown
C
3
560µF
5V/10A
OUT
✕
V
OUT
is regulated
0.1µF