CS5124XD8 ON Semiconductor, CS5124XD8 Datasheet - Page 5
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CS5124XD8
Manufacturer Part Number
CS5124XD8
Description
IC CTRLR PWM CURRENT MODE 8-SOIC
Manufacturer
ON Semiconductor
Datasheet
1.CS5124XDR8G.pdf
(11 pages)
Specifications of CS5124XD8
Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
440kHz
Duty Cycle
85%
Voltage - Supply
7.6 V ~ 20 V
Buck
No
Boost
No
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
440kHz
Output Voltage
- 0.3 V to + 20 V
Output Current
200 mA
Mounting Style
SMD/SMT
Switching Frequency
440 KHz
Operating Supply Voltage
7.7 V to 20 V
Maximum Operating Temperature
+ 135 C
Fall Time
25 ns
Minimum Operating Temperature
- 40 C
Rise Time
45 ns
Synchronous Pin
No
Topology
Flyback, Forward
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS5124XD8G
Manufacturer:
ON Semiconductor
Quantity:
34
PIN #
1
2
3
4
5
6
7
8
I
UVLO
GATE
SENSE
BIAS
GND
V
V
Pin
SS
CC
FB
V
V
internally clamped at 15 V when the IC is in sleep mode.
Sleep and under voltage lockout pin. A voltage greater than 1.8 V causes the chip to “wake up” however the GATE
remains low. A voltage greater than 2.6 V on this pin allows the output to switch.
Soft−Start Capacitor Pin. A capacitor placed between SS and GROUND is charged with 10 mA and discharged with
10 mA. The Soft−Start capacitor controls both Soft−Start time and hiccup mode frequency.
Voltage Feedback Pin. The collector of an optocoupler is typically tied to this pin. This pin is pulled up internally by a
4.3 kW resistor to 5.0 V and is clamped internally at 2.9 V (2.65 V). If V
and GATE will stay high. If the V
Current Sense Pin. This pin is connected to the current sense resistor on the primary side. If V
GATE will go low if I
Gate Drive Output Pin. Capable of driving a 3.0 nF load. GATE is nominally clamped to 13.5 V.
Ground Pin.
CC
CC
Power Input Pin.
Clamp Output Pin. This pin will control the gate of an N−channel MOSFET that in turn regulates Vcc. This pin is
SENSE
= 195 mV (335 mV). If I
PACKAGE PIN DESCRIPTION
FB
pin is pulled < 0.49 V, GATE will stay low.
http://onsemi.com
5
SENSE
Description
> 275 mV (525 mV), Soft−Start will be initiated.
FB
is pulled > 4.0 V, the oscillator is disabled
FB
is floating, the