MC33470DW ON Semiconductor, MC33470DW Datasheet - Page 10

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MC33470DW

Manufacturer Part Number
MC33470DW
Description
IC CONV DC/DC SYNC RECT 20-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC33470DW

Applications
Controller, Intel Pentium® II
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Voltage - Output
1.8 ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Design Example
dc−to−dc converter:
should be chosen which have a low value of R
the threshold voltage rating of the MOSFET must also be
greater than 1.5 V, to prevent turn on of the synchronous
rectifier MOSFETs due to dv/dt coupling through the Miller
capacitance of the MOSFET drain−to−source junction.
Figure 17 shows the gate voltage transient due to this effect.
for both the main switch and the synchronous rectifier to
maximize efficiency.
full load current, the minimum value of the inductor will be:
mount 1.5 mH choke which is rated for for full load current.
resistance of the output capacitance. Therefore:
maximum
chosen. Or OSCON capacitors may be used if leaded parts are
acceptable. In this case, the output capacitance consists of two
parallel 820 mF, 4.0 V capacitors. Each capacitor has a
maximum specified ESR of 0.012 W.
In this case, the current pulses may be 14 A peak. If a 1.5 mH
choke is used, two parallel OSCON 150 mF, 16 V capacitors
will provide a filter cutoff frequency of 7.5 kHz.
Given the following requirements, design a switching
Efficiency > 80% at full load
Output ripple voltage ≈ 1% of output voltage
In order to meet the efficiency requirement, MOSFETs
In this design, choose two parallel MMSF3300 MOSFETs
In order to maintain continuous mode operation at 10% of
L
Coilcraft’s U6904, or an equivalent, provides a surface
V
ESR
The AVX TPS series of tantalum chip capacitors may be
As with all buck converters, input current is drawn in pulses.
1. Choose power MOSFETs.
2. D ≈ V
3. Inductor selection
min
4. Output capacitor selection
5. Input Filter
ripple
max
= (V
= (5 − 2.8)(0.56 x 3.3 ms)/(2 x 1.4 A) = 1.45 mH
≈ D I
Output current
= V
in
VID4−0 bits
O
/V
− V
ripple
L
in
V
x ESR, where ESR is the equivalent series
V
O
CCP
= 2.8/5.0 = 0.56
/D I
)(DTs)/(2I
CC
= 5.0 V
= 12 V
= 10111 − Output Voltage = 2.8 V
= 0.3 A to 14 A
L
= 0.01 x 2.8 V/1.4 A = 0.02 W
O min
)
DS(on)
APPLICATIONS INFORMATION
. However,
http://onsemi.com
MC33470
10
C
capacitor creates a zero at:
Where V
internal timing capacitor. In order to make the feedback loop
as responsive as possible to load changes, choose the unity
gain frequency to be 10% of the switching frequency, or
30 kHz. Plotting the PWM gain over frequency, at a frequency
of 30 kHz the gain is about −16.5 dB = 0.15. Therefore, to have
a 30 kHz unity gain loop, the error amplifier gain at 30 kHz
should be 1/0.15 = 6.7. Choose a design phase margin for the
loop of 60°. Also, choose the error amp type to be an integrator
for best dc regulation performance. The phase boost needed by
the error amplifier is then 60° for the desired phase margin.
Then, the following calculations can be made:
top and bottom views are shown in Figures 18 and 19.
o
The corner frequency of the output filter with L = 1.5 mH and
f
The dc gain of the PWM is: Gain = V
k = tan [Boost/2 + 45°] = tan [60/2 + 45] = 3.73
Error Amp zero freq = f
Error Amp pole freq = K
R2 = Error Amp Gain/G
C16 = 1/(2π R2 f
C17 = 1/(2π R2 f
The complete design is shown in Figure 14. The PC board
z
= 1640 mF is 3.2 kHz. In addition, the ESR of each output
6. Feedback Loop Compensation
= 1/(2π C ESR) = 1/(2π x 820 mF x 0.012) = 16.2 kHz
Figure 17. Voltage Coupling Through Miller
8.2 k standard value
= 2426 pF − use 2200 pF
= 173 pF − use 100 pF
pp
is the peak−to−peak sawtooth voltage across the
z
p
) = 1/(2π x 8.2 k x 8.0 kHz)
) = 1/(2π x 8.2 k x 112 kHz)
Capacitance
c
m
/K = 30 kHz/3.73 = 8.0 kHz
fc
= 6.7/800 m = 8.375 k − use an
= 3.73 x 30 kHz = 112 kHz
in
/V
pp
= 5/1 = 5.0.

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