MAX8744AETJ+ Maxim Integrated Products, MAX8744AETJ+ Datasheet - Page 30

• Manufacturer Part Number: MAX8744AETJ+
• Description: IC CNTRLR PWR SUP QUAD 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8744AETJ+

• Applications: Controller, Notebook Computers
• Voltage - Input: 6 ~ 26 V
• Number Of Outputs: 4
• Voltage - Output: 3.3V, 5V, 1 ~ 26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The 40/60 optimal interleaved architecture of the
MAX8744A/MAX8745A allows the input voltage to go
as low 8.3V before the duty cycles begin to overlap.
This offers improved efficiency over a regular 180° out-
of-phase architecture where the duty cycles begin to
overlap below 10V. Figure 8 shows the input-capacitor
RMS current vs. input voltage for an application that
requires 5V/5A and 3.3V/5A. This shows the improve-
ment of the 40/60 optimal interleaving over 50/50 inter-
leaving and in-phase operation.
For most applications, nontantalum chemistries (ceramic,
aluminum, or OS-CON) are preferred due to their resis-
tance to power-up surge currents typical of systems
with a mechanical switch or connector in series with the
input. Choose a capacitor that has less than 10°C tem-
perature rise at the RMS input current for optimal relia-
bility and lifetime.
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (> 20V) AC adapters. Low-
current applications usually require less attention.
The high-side MOSFET (N
the resistive losses plus the switching losses at both
V
should be roughly equal to the losses at V
lower losses in between. If the losses at V
significantly higher, consider increasing the size of N
Conversely, if the losses at V
higher, consider reducing the size of N
vary over a wide range, maximum efficiency is achieved
by selecting a high-side MOSFET (N
tion losses equal to the switching losses.
Choose a low-side MOSFET (N
sible on-resistance (R
package (i.e., 8-pin SO, DPAK, or D
ably priced. Ensure that the MAX8744A/MAX8745A DL_
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
drain-to-gate capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems may
occur. Switching losses are not an issue for the low-side
MOSFET since it is a zero-voltage switched device when
used in the step-down topology.
Worst-case conduction losses occur at the duty-factor
extremes. For the high-side MOSFET (N
case power dissipation due to resistance occurs at mini-
mum input voltage:
High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
30
IN(MIN)
______________________________________________________________________________________
and V
IN(MAX)
DS(ON)
Power-MOSFET Selection
. Ideally, the losses at V
H
Power-MOSFET Dissipation
), comes in a moderate-sized
) must be able to dissipate
L
IN(MAX)
) that has the lowest pos-
2
PAK), and is reason-
H
) that has conduc-
H
are significantly
. If V
H
IN(MAX)
), the worst-
IN
IN(MIN)
does not
IN(MIN)
, with
are
H
.
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R
tion limits often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction (R
do not become an issue until the input is greater than
approximately 15V.
Calculating the power dissipation in high-side MOSFETs
(N
allow for difficult-to-quantify factors that influence the turn-
on and turn-off times. These factors include the internal
gate resistance, gate charge, threshold voltage, source
inductance, and PCB layout characteristics. The following
switching-loss calculation provides only a very rough esti-
mate and is no substitute for breadboard evaluation,
preferably including verification using a thermocouple
mounted on N
where C
the charge needed to turn on the N
is the peak gate-drive source/sink current (1A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied, due to the squared term in the switching-
loss equation (C x V
chosen for adequate R
becomes extraordinarily hot when subjected to
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
DS(ON)
IN(MAX)
H
) due to switching losses is difficult, since it must
PD N
PD N Switching
⎛
⎜
⎝
I
LOAD G SW
(
OSS
(
required to stay within package power-dissipa-
, consider choosing another MOSFET with
I
H
GATE
H
PD N
Q
⎡
⎢
⎢
⎣
Re
is the output capacitance of N
1
DS(ON)
H
LOAD(MAX)
−
:
sistive
(
(
⎛
⎜
⎝
L
V
IN MAX
)
Re
V
IN
OUT
) losses. High-side switching losses
(
)
+
sistive
2 x f
=
)
C
DS(ON)
=
⎛
⎜
⎝
OSS IN MAX
)
, but are not high enough to
V
SW
⎞
⎟
⎠
OUT
V
⎤
⎥
⎥
⎦
IN
)
(
I
). If the high-side MOSFET
=
V
LOAD
L
2
), the worst-case power
⎞
⎟
⎠
at low battery voltages
(
(
I
LOAD
H
)
2
MOSFET, and I
)
R
⎞
⎟
⎠
DS ON
)
V
2
IN MAX SW
(
R
(
DS ON
H
)
, Q
(
)
f
G(SW)
)
GATE
is