LT1956EGN-5#PBF Linear Technology, LT1956EGN-5#PBF Datasheet - Page 22
![IC SW REG STP-DWN HI VOLT 16SSOP](/photos/6/59/65965/161-16-ssop_sml.jpg)
LT1956EGN-5#PBF
Manufacturer Part Number
LT1956EGN-5#PBF
Description
IC SW REG STP-DWN HI VOLT 16SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LT1956EGNPBF.pdf
(28 pages)
Specifications of LT1956EGN-5#PBF
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
5V
Current - Output
1.5A
Frequency - Switching
500kHz
Voltage - Input
5.5 ~ 60 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Primary Input Voltage
15V
No. Of Outputs
1
Output Voltage
68V
Output Current
1.2A
No. Of Pins
16
Operating Temperature Range
-40°C To +125°C
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
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LT1956/LT1956-5
APPLICATIO S I FOR ATIO
oscillations. If needed, an additional capacitor (C
added across the R
to further suppress V
With a tantalum output capacitor, the LT1956 already
includes a resistor (R
pin (see Figures 10 and 11) to compensate the loop over
the entire V
high V
can still be used with a simple adjustment to the resistor
R
for stabilizing LT1956). If additional phase margin is
required, a capacitor (C
output and FB pin but care must be taken for high output
voltage applications. Sudden shorts to the output can
create unacceptably large negative transients on the FB
pin.
For V
possible by readjusting the frequency compensation com-
ponents at the V
When checking loop stability, the circuit should be oper-
ated over the application’s full voltage, current and tem-
perature range. Proper loop compensation may be obtained
by empirical methods as described in Application Notes 19
and 76.
22
LT1956
GND
C
CURRENT MODE
POWER STAGE
for stable operation (see Ceramic Capacitors section
g
m
IN
= 2mho
IN
-to-V
V
-to-V
R
C
C
C
200k
C
R
IN
O
OUT
OUT
range (to allow for stable pulse skipping for
2000 mho
g
C
AMPLIFIER
C
m
ratios < 4, higher loop bandwidths are
F
Figure 10. Model for Loop Response
ratios 4). A ceramic output capacitor
ERROR
pin.
=
C
U
–
+
/C
C
C
C
) and filter capacitor (C
ripple voltage.
network from the V
1.22V
FB
SW
U
FB
) can be inserted between the
C
FB
W
R1
R2
R
LOAD
C
pin to ground
F
1956 F10
U
) at the V
+
F
) can be
TANTALUM
ESR
C1
OUTPUT
C
CERAMIC
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT1956 can be held up by the backup
supply with the LT1956 input disconnected. In this condi-
tion, the SW pin will source current into the V
SHDN pin is held at ground, only the shut down current of
25 A will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT1956 will consume its
quiescent operating current of 1.5mA. The V
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the V
maximum rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 13 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
configuration with the addition of R3, R4, C
As the output starts to rise, Q1 turns on, regulating switch
ESL
C1
–20
–40
80
60
40
20
0
10
V
V
I
C
Figure 11. Overall Loop Response
PHASE
LOAD
IN
OUT
OUT
= 12V
= 5V
= 100 F, 10V, 0.1
= 500mA
100
GAIN
FREQUENCY (Hz)
1k
10k
R
C
C
C
F
C
= 220pF
= 22nF
= 2.2k
IN
100k
IN
pin will also
SS
IN
pin. If the
1956 F11
absolute
and Q1.
1M
180
150
120
90
60
30
0
1956f