LT3500IDD#PBF Linear Technology, LT3500IDD#PBF Datasheet - Page 17

• Manufacturer Part Number: LT3500IDD#PBF
• Description: IC REG STP-DWN 2A 12-DFN
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT3500IDD#PBF

• Topology: Step-Down (Buck) (1), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 2
• Frequency - Switching: 500kHz ~ 2.4MHz
• Voltage/current - Output 1: 0.8 ~ 38.9 V, 2A
• Voltage/current - Output 2: Adjustable, 13mA
• W/led Driver: No
• W/supervisor: No
• W/sequencer: No
• Voltage - Supply: 3 V ~ 36 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 12-DFN
• Current - Output: 2A
• Voltage - Output: 0.8 ~ 38.9 V
• Voltage - Input: 3 ~ 36 V
• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS INFORMATION
The only reason to consider a larger diode is the worst-
case condition of a high input voltage and shorted output.
With a shorted condition, diode current will increase to a
typical value of 3A, determined by the peak switch current
limit of the LT3500. This is safe for short periods of time,
but it would be prudent to check with the diode manu-
facturer if continuous operation under these conditions
can be tolerated.
BST Pin Considerations
The capacitor and diode tied to the BST pin generate
a voltage that is higher than the input voltage. In most
cases a 0.47μF capacitor and fast switching diode (such
as the CMDSH-3 or FMMD914) will work well. Almost
any type of fi lm or ceramic capacitor is suitable, but the
ESR should be <1Ω to ensure it can be fully recharged
during the off time of the switch. The capacitor value can
be approximated by:
C
BST
V
V
=
IN
IN
50 • V
(
I
OUT1(MAX)
OUT1
V
V
V
V
V
BST
BST(MAX)
V
V
BST
BST(MAX)
OUT2
IN
IN
– V
– V
≥ 2.5V
− V
LT3500
LT3500
SW
SW
(5a)
(5c)
= V
= V
= V
= V
BST(MIN)
IN
IN
OUT1
• DC
OUT2
LDRV
+ V
LDRV
+ V
BST
BST
SW
SW
OUT1
OUT2
)
• f
C3
D1
D2
C3
D1
Figure 5. BST Pin Considerations
V
V
OUT2
OUT1
D2
V
OUT1
where I
V
the switch.
Figure 5 shows four ways to arrange the boost circuit.
The BST pin must be more than 2.2V above the SW pin
for full effi ciency.
Generally, for outputs of 3.3V and higher the standard
circuit (Figure 5a) is the best. For outputs between 2.8V
and 3.3V, replace the D2 with a small Schottky diode such
as the PMEG4005.
For lower output voltages the boost diode can be tied to
the input (Figure 5b). The circuit in Figure 5a is more ef-
fi cient because the BST pin current comes from a lower
voltage source.
Figure 5c shows the boost voltage source from the linear
output that is set to greater than 2.5V (any available DC
sources that are greater than 2.5V is suffi cient). The highest
effi ciency is attained by choosing the lowest boost volt-
age above 2.5V. You must also be sure that the maximum
voltage at the BST pin is less than the maximum specifi ed
in the Absolute Maximum Ratings section.
V
V
BST(MIN)
IN
IN
OUT1(MAX)
is the minimum boost voltage to fully saturate
V
V
V
V
V
V
BST
BST(MAX)
BST
BST(MAX)
IN
IN
– V
– V
LT3500
LT3500
SW
(5b)
(5d)
SW
= 2 • V
= V
= V
is the maximum load current, and
= V
X
IN
X
LDRV
LDRV
IN
BST
BST
SW
SW
D2
C3
D2
D1
D1
V
X
> V
IN
+ 3V
3500 F05
LT3500
V
V
OUT1
OUT1
17
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