LM5010MH/NOPB National Semiconductor, LM5010MH/NOPB Datasheet - Page 14
![IC BUCK ADJ 1A 14TSSOP](/photos/7/0/70080/pkg_mxa14a_sml.jpg)
LM5010MH/NOPB
Manufacturer Part Number
LM5010MH/NOPB
Description
IC BUCK ADJ 1A 14TSSOP
Manufacturer
National Semiconductor
Type
Step-Down (Buck)r
Datasheet
1.LM5010SDNOPB.pdf
(19 pages)
Specifications of LM5010MH/NOPB
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
2.5 ~ 70 V
Current - Output
1A
Frequency - Switching
1MHz
Voltage - Input
8 ~ 75 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP Exposed Pad, 14-eTSSOP 14-HTSSOP
Primary Input Voltage
75V
No. Of Outputs
1
Output Voltage
70V
Output Current
1A
Voltage Regulator Case Style
TSSOP
No. Of Pins
14
Operating Temperature Range
-40°C To +125°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Dc
1030
For Use With
LM5010 EVAL - BOARD EVALUATION LM5010
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Other names
*LM5010MH
*LM5010MH/NOPB
LM5010MH
*LM5010MH/NOPB
LM5010MH
www.national.com
Applications Information
The minimum ESR for C2 is then equal to:
If the capacitor used for C2 does not have sufficient ESR, R3
is added in series as shown in Figure 1. C2 should generally
be no smaller than 3.3 µF, although that is dependent on the
frequency and the allowable ripple amplitude at V
perimentation is usually necessary to determine the mini-
mum value for C2, as the nature of the load may require a
larger value. A load which creates significant transients re-
quires a larger value for C2 than a non-varying load.
D1: The important parameters are reverse recovery time and
forward voltage drop. The reverse recovery time determines
how long the current surge lasts each time the buck switch is
turned on. The forward voltage drop is significant in the
event the output is short-circuited as it is mainly this diode’s
voltage (plus the voltage across the current limit sense re-
sistor) which forces the inductor current to decrease during
the off-time. For this reason, a higher voltage is better,
although that affects efficiency. A reverse recovery time of
)30 ns, and a forward voltage drop of )0.75V are preferred.
The reverse leakage specification is important as that can
significantly affect efficiency. Other types of diodes may have
a lower forward voltage drop, but may have longer recovery
times, or greater reverse leakage. D1 should be rated for the
maximum V
(I
where 1.5A is the maximum guaranteed current limit thresh-
old, and the maximum ripple current was previously calcu-
lated as 234 mAp-p. Note that this calculation is valid only
when R
C1: Assuming the voltage supply feeding V
impedance greater than zero, this capacitor limits the ripple
voltage at V
during the on-time. At maximum load current, when the buck
switch turns on, the current into V
PK
in Figure 11) which is equal to:
CL
is not required.
IN
IN
, and for the peak current when in current limit
I
PK
while supplying most of the switch current
= 1.5A + I
OR(max)
IN
= 1.734A
increases to the lower
IN
(Continued)
has a source
OUT1
. Ex-
(10)
14
peak of the output current waveform, ramps up to the peak
value, then drops to zero at turn-off. The average current into
V
calculation, C1 must supply this average load current during
the maximum on-time. The maximum on-time is calculated
using Equation 5, with a 25% tolerance added:
C1 is calculated from:
where I
voltage at V
tors with a low ESR should be used for C1. To allow for
capacitor tolerances and voltage effects, a 2.2 µF capacitor
will be used
C3: The capacitor at the V
filtering and stability, but also prevents false triggering of the
V
reason, C3 should be no smaller than 0.1 µF, and should be
a good quality, low ESR, ceramic capacitor. This capacitor
also determines the initial startup delay (t1 in Figure 8).
C4: The recommended value for C4 is 0.022 µF. A high
quality ceramic capacitor with low ESR is recommended as
C4 supplies the surge current to charge the buck switch gate
at turn-on. A low ESR also ensures a complete recharge
during each off-time.
C5: This capacitor suppresses transients and ringing due to
long lead inductance at V
capacitor is recommended, located physically close to the
LM5010.
C6: The capacitor at the SS pin determines the softstart
time, i.e. the time for the reference voltage at the regulation
comparator, and the output voltage, to reach their final value.
The time is determined from the following:
For a 5 ms softstart time, C6 calculates to 0.022 µF.
FINAL CIRCUIT
The final circuit is shown in Figure 14, and its performance is
shown in Figures 15 - 18.
IN
CC
during this on-time is the load current. For a worst case
UVLO at the buck switch on/off transitions. For this
O
is the load current, and ∆V is the allowable ripple
IN
(1V for this example). Quality ceramic capaci-
IN
. A low ESR, 0.1 µF ceramic chip
CC
pin provides not only noise