LT3991EMSE#PBF Linear Technology, LT3991EMSE#PBF Datasheet - Page 17

• Manufacturer Part Number: LT3991EMSE#PBF
• Description: IC BUCK SYNC ADJ 1.2A 10MSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT3991EMSE#PBF

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.19 ~ 30 V
• Current - Output: 1.2A
• Frequency - Switching: 200kHz ~ 2MHz
• Voltage - Input: 4.3 ~ 55 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP Exposed Pad, 10-HMSOP, 10-eMSOP
• Primary Input Voltage: 12V
• No. Of Outputs: 1
• Output Voltage: 30V
• Output Current: 1.2A
• No. Of Pins: 10
• Operating Temperature Range: -40°C To +125°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS INFORMATION
Soft-Start
The SS pin can be used to soft-start the LT3991 by throttling
the maximum input current during start-up. An internal 1μA
current source charges an external capacitor generating a
voltage ramp on the SS pin. The SS pin clamps the internal
V
current limit is reached when the SS pin is about 1.5V or
higher. By selecting a large enough capacitor, the output
can reach regulation without overshoot. A 100k resistor
in series with the soft-start capacitor is recommended.
Figure 7 shows start-up waveforms for a typical application
with a 10nF capacitor and a 100k resistor on SS for a 3.3Ω
load when the EN pin is pulsed high for 10ms.
The external SS capacitor is only actively discharged when
EN is low. With EN low, the external SS cap is discharged
through approximately 150Ω. The EN pin needs to be low
long enough for the external cap to completely discharge
through the 150Ω pull-down and external series resistor
prior to start-up.
Synchronization
To select low ripple Burst Mode operation, tie the SYNC pin
below 0.6V (this can be ground or a logic low output).
Synchronizing the LT3991 oscillator to an external fre-
quency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.6V
and peaks above 1.0V (up to 6V).
C
Figure 7. Soft-Start Waveforms for Front-Page Application
with 10nF Capacitor and 100k Series Resistor on SS.
EN is Pulsed High for About 10ms with a 3.3Ω Load Resistor
node, which slowly ramps up the current limit. Maximum
0.5V/DIV
0.5A/DIV
2V/DIV
V
V
OUT
SS
I
L
2ms/DIV
3991 F07
The LT3991 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation.
The LT3991 may be synchronized over a 250kHz to 2MHz
range. The R
switching frequency 20% below the lowest synchronization
input. For example, if the synchronization signal will be
250kHz and higher, the R
To assure reliable and safe operation the LT3991 will only
synchronize when the output voltage is near regulation as
indicated by the PG flag. It is therefore necessary to choose
a large enough inductor value to supply the required output
current at the frequency set by the R
Inductor Selection section). The slope compensation is set
by the R
required to avoid subharmonic oscillations is established
by the inductor size, input voltage, and output voltage.
Since the synchronization frequency will not change the
slopes of the inductor current waveform, if the inductor
is large enough to avoid subharmonic oscillations at the
frequency set by R
sufficient for all synchronization frequencies.
Shorted and Reversed Input Protection
If the inductor is chosen so that it won’t saturate exces-
sively, an LT3991 buck regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT3991 is absent. This may occur in battery charging ap-
plications or in battery backup systems where a battery
or some other supply is diode ORed with the LT3991’s
output. If the V
is held high (either by a logic signal or because it is tied
to V
quiescent current through its SW pin. This is fine if your
system can tolerate a few μA in this state. If you ground
the EN pin, the SW pin current will drop to essentially
zero. However, if the V
is held high, regardless of EN, parasitic diodes inside the
LT3991 can pull current from the output through the SW
pin and the V
only when the input voltage is present and that protects
against a shorted or reversed input.
LT3991/LT3991-3.3/LT3991-5
IN
), then the LT3991’s internal circuitry will pull its
T
value, while the minimum slope compensation
T
IN
resistor should be chosen to set the LT3991
IN
pin. Figure 8 shows a circuit that will run
pin is allowed to float and the EN pin
T
, than the slope compensation will be
IN
pin is grounded while the output
T
should be selected for 200kHz.
T
resistor (see the
17
3991fa