LTC1735CF Linear Technology, LTC1735CF Datasheet - Page 10

IC SW REG SYNC STEP-DWN 20-TSSOP

LTC1735CF

Manufacturer Part Number
LTC1735CF
Description
IC SW REG SYNC STEP-DWN 20-TSSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1735CF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 6 V
Current - Output
3A
Frequency - Switching
300kHz
Voltage - Input
4 ~ 30 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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LTC1735
OPERATIO
The main control loop is shut down by pulling Pin 2
(RUN/SS) low. Releasing RUN/SS allows an internal 1.2 A
current source to charge soft-start capacitor C
C
I
value. As C
leased allowing normal operation to resume. If V
not reached 70% of its final value when C
to 4.1V, latchoff can be invoked as described in the
Applications Information section.
The internal oscillator can be synchronized to an external
clock applied to the FCB pin and can lock to a frequency
between 90% and 130% of its nominal rate set by capaci-
tor C
An overvoltage comparator, OV, guards against transient
overshoots (>7.5%) as well as other more serious
conditions that may overvoltage the output. In this case,
the top MOSFET is turned off and the bottom MOSFET is
turned on until the overvoltage condition is cleared.
Foldback current limiting for an output shorted to ground
is provided by amplifier A. As V
the buffered I
ally pulled down to a 0.86V clamp. This reduces peak
inductor current to about 1/4 of its maximum value.
Low Current Operation
The LTC1735 has three low current modes controlled by
the FCB pin. Burst Mode operation is selected when the
FCB pin is above 0.8V (typically tied to INTV
Mode operation, if the error amplifier drives the I
below 0.86V, the buffered I
parator will be clamped at 0.86V. The inductor current
peak is then held at approximately 20mV/R
1/4 of maximum output current). If I
0.5V, the Burst Mode comparator B will turn off both
MOSFETs to maximize efficiency. The load current will be
supplied solely by the output capacitor until I
above the 60mV hysteresis of the comparator and switch-
ing is resumed. Burst Mode operation is disabled by
comparator F when the FCB pin is brought below 0.8V.
This forces continuous operation and can assist second-
ary winding regulation.
10
TH
SS
voltage clamped at approximately 30% of its maximum
reaches 1.5V, the main control loop is enabled with the
OSC
.
SS
TH
continues to charge, I
input to the current comparator is gradu-
U
(Refer to Functional Diagram)
TH
input to the current com-
OSENSE
TH
TH
drops below 0.6V,
then drops below
is gradually re-
SS
SENSE
CC
has charged
). In Burst
TH
SS
TH
OUT
voltage
. When
(about
rises
has
When the FCB pin is driven by an external oscillator, a low
noise cycle-skipping mode is invoked and the internal
oscillator is synchronized to the external clock by com-
parator C. In this mode the 25% minimum inductor
current clamp is removed, providing constant frequency
discontinuous operation over the widest possible output
current range. This constant frequency operation is not
quite as efficient as Burst Mode operation, but provides a
lower noise, constant frequency spectrum.
Tying the FCB pin to ground enables forced continuous
operation. This is the least efficient mode, but is desirable
in certain applications. The output can source or sink
current in this mode. When sinking current while in forced
continuous operation, current will be forced back into the
main power supply potentially boosting the input supply to
dangerous voltage levels—BEWARE.
Foldback Current, Short-Circuit Detection and
Short-Circuit Latchoff
The RUN/SS capacitor, C
inrush current of the switching regulator. After the con-
troller has been started and been given adequate time to
charge up the output capacitors and provide full load cur-
rent, C
output voltage falls to less than 70% of its nominal output
voltage, C
the output is in an overcurrent and/or short-circuit condi-
tion. If the condition lasts for a long enough period as
determined by the size of C
down until the RUN/SS pin voltage is recycled. This built-
in latchoff can be overridden by providing a current >5 A
at a compliance of 5V to the RUN/SS pin. This current
shortens the soft-start period but also prevents net dis-
charge of C
condition. Foldback current limiting is activated when the
output voltage falls below 70% of its nominal level whether
or not the short-circuit latchoff circuit is enabled.
SS
is used as a short-circuit time-out circuit. If the
SS
SS
begins discharging on the assumption that
during an overcurrent and/or short-circuit
SS
SS
, is used initially to limit the
, the controller will be shut
1735fc

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