LT1737CS Linear Technology, LT1737CS Datasheet - Page 25

• Manufacturer Part Number: LT1737CS
• Description: IC CTRLR ISOLATED FLYBACK 16SOIC
• Manufacturer: Linear Technology
• Type: Flybackr

Specifications of LT1737CS

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Frequency - Switching: 50kHz ~ 250kHz
• Voltage - Input: 4.1 ~ 20 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -

TYPICAL APPLICATIO S
therefore requires a physically larger transformer. The larg-
est size VERSA-PAC is used, a VP5-0083. Three windings
are paralleled for both the primary and secondary.
Overall power supply efficiency and output regulation ver-
sus load current at the nominal V
Figures 16 and 17.
5.25
5.00
4.75
90
80
70
60
50
40
30
20
0.01
0
Figure 16. Efficiency vs I
Figure 17. Load Regulation
1
0.1
I
I
LOAD
LOAD
2
(A)
(A)
1
U
IN
3
= 5V may be seen in
LOAD
1737 F16
1737 F17
10
4
NONISOLATED APPLICATION
While the LT1737 was designed to serve isolated flyback
applications, it is useful to note that it is also capable of
supporting nonisolated applications. These are performed
by providing a continuous pseudo-DC feedback signal to
the FB pin. (The part behaves as if the flyback waveform
is infinitely long.) Figure 18 demonstrates just such a
system.
A SEPIC topology is shown whereby a 8V to 16V input is
converted to a nonisolated 12V output. A conventional
resistive feedback divider, R3/R4 drives the FB pin. (Ca-
pacitor C7 serves to filter out high frequency ripple in the
output voltage.) A combination of an R/C network (R11/
C5) in parallel with a single capacitor (C9) on the V
provides the required loop compensation. The load com-
pensation function is unwanted, so the R
open and the R
dropout regulator is programmed to a nominal 8.25V
output by the R12/R13 resistor divider, and this allows the
LT1737 to drive M1, a logic level MOSFET. Minimum on
time programming resistor R5 is set to 33k to minimize the
required output preload. Minimum enable time has no
direct effect on steady state operation, but programming
resistor R7 has been set to 100k for rapid start-up. Enable
delay resistor is similarly set to 24k.
Overall power supply efficiency versus input voltage and
load current may be seen in Figure 19. Because this
application example utilizes a nonisolated topology, load
regulation is not an issue. It is typically 0.2% (25mV) from
no load to full load.
Other nonisolated switching topologies may be similarly
implemented. For example, Boost and NonIsolated Fly-
back readily suggest themselves. (A Nonisolated Flyback
topology also can be used to generate a negative output
voltage. In this case, the feedback is a dynamic waveform
derived from the primary side of the transformer, similar
to an isolated LT1737 application.)
CMPC
pin is grounded. An LT1121 low
OCMP
LT1737
pin is left
25
C
node
1737fa