LT3757HMSE#PBF Linear Technology, LT3757HMSE#PBF Datasheet - Page 26

• Manufacturer Part Number: LT3757HMSE#PBF
• Description: IC DC-DC CTRLR ADJ 10MSOP
• Manufacturer: Linear Technology
• Type: Step-Up (Boost), Inverting, Flyback, Sepicr

Specifications of LT3757HMSE#PBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Frequency - Switching: 100kHz ~ 1MHz
• Voltage - Input: 2.9 ~ 40 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP Exposed Pad, 10-HMSOP, 10-eMSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -

LT3757
applicaTions inForMaTion
Board Layout
The high speed operation of the LT3757 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC, and is important for thermal management of the
IC. Therefore, it is crucial to achieve a good electrical and
thermal contact between the Exposed Pad and the ground
vided to dissipate the heat generated within the package.
It is recommended that multiple vias in the printed circuit
board be used to conduct heat away from the IC and into
a copper plane with as much area as possible.
To prevent radiation and high frequency resonance
problems, proper layout of the components connected
to the IC is essential, especially the power paths with
higher di/dt. The following high di/dt loops of different
plane of the board. For the LT3757 to deliver its full output
power, it is imperative that a good thermal path be pro-

VIAS TO GROUND
PLANE
Figure 11. 8V to 16V Input, 24V/2A Output Boost Converter Suggested Layout
C
C
R1
R2
R
R
C1
C2
SS
T
R
C
1
2
3
4
5
LT3757
10
9
8
7
6
C
C
OUT2
IN
R3
C
R
VCC
S
topologies should be kept as tight as possible to reduce
inductive ringing:
• In boost configuration, the high di/dt loop contains
• In flyback configuration, the high di/dt primary loop
• In SEPIC configuration, the high di/dt loop contains
• In inverting configuration, the high di/dt loop contains
1
2
3
4
the output capacitor, the sensing resistor, the power
MOSFET and the Schottky diode.
contains the input capacitor, the primary winding, the
power MOSFET and the sensing resistor. The high
di/dt secondary loop contains the output capacitor, the
secondary winding and the output diode.
the power MOSFET, sense resistor, output capacitor,
Schottky diode and the coupling capacitor.
power MOSFET, sense resistor, Schottky diode and the
coupling capacitor.
C
OUT1
M1
8
7
6
5
D1
L1
3757 F10
V
V
IN
OUT
3757fb