LT1376CS8 Linear Technology, LT1376CS8 Datasheet - Page 21
![IC SW REG 1.5A ADJ STP-DWN 8SOIC](/photos/6/62/66297/8-soic_05-08-1610_sml.jpg)
LT1376CS8
Manufacturer Part Number
LT1376CS8
Description
IC SW REG 1.5A ADJ STP-DWN 8SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LT1376CS8PBF.pdf
(28 pages)
Specifications of LT1376CS8
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
2.42 ~ 21.5 V
Current - Output
1.5A
Frequency - Switching
500kHz
Voltage - Input
5 ~ 25 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LT1376CS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT1376CS8#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LT1376CS8#TR
Manufacturer:
LINEAR
Quantity:
7 388
Company:
Part Number:
LT1376CS8#TRPBF
Manufacturer:
LINEAR
Quantity:
10 119
Part Number:
LT1376CS8#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT1376CS8-5
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LT1376CS8-5#TR
Manufacturer:
LT
Quantity:
41
Part Number:
LT1376CS8-5#TR
Manufacturer:
LT/凌特
Quantity:
20 000
Company:
Part Number:
LT1376CS8-5#TRPBF
Manufacturer:
LINEAR
Quantity:
10 602
APPLICATIONS
77dB at low frequency, rolling off to unity-gain at 20kHz.
Phase shows a two-pole characteristic until the ESR of the
output capacitor brings it back above 10kHz. Phase mar-
gin is about 60° at unity-gain.
Analog experts will note that around 1kHz, phase dips very
close to the zero phase margin line. This is typical of switch-
ing regulators, especially those that operate over a wide
range of loads. This region of low phase is not a problem
as long as it does not occur near unity-gain. In practice, the
variability of output capacitor ESR tends to dominate all
other effects with respect to loop response. Variations in
ESR will cause unity-gain to move around, but at the same
time phase moves with it so that adequate phase margin
is maintained over a very wide range of ESR (≥ ±3:1).
What About a Resistor in the Compensation Network?
It is common practice in switching regulator design to add
a “zero” to the error amplifier compensation to increase
loop phase margin. This zero is created in the external
network in the form of a resistor (R
compensation capacitor. Increasing the size of this resis-
tor generally creates better and better loop stability, but
there are two limitations on its value. First, the combina-
tion of output capacitor ESR and a large value for R
cause loop gain to stop rolling off altogether, creating a
gain margin problem. An approximate formula for R
where gain margin falls to zero is:
G
G
With V
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics. This
resistor sets high frequency gain of the error amplifier,
including the gain at the switching frequency. If switching
frequency gain is high enough, output ripple voltage will
appear at the V
MP
MA
R Loop
C
= Transconductance of power stage = 2A/V
= Error amplifier transconductance = 2 × 10
(
OUT
ESR = Output capacitor ESR
2.42 = Reference voltage
= 5V and ESR = 0.1Ω, a value of 5.17k for R
Gain = 1
C
pin with enough amplitude to muck up
U
)
=
( )( )( )( )
INFORMATION
G
U
MP
G
MA
V
W
OUT
C
ESR
) in series with the
2 42
.
U
–3
C
may
C
C
proper operation of the regulator. In the marginal case,
subharmonic switching occurs, as evidenced by alternat-
ing pulse widths seen at the switch node. In more severe
cases, the regulator squeals or hisses audibly even though
the output voltage is still roughly correct. None of this will
show on a theoretical Bode plot because Bode is an
amplitude insensitive analysis. Tests have shown that if
ripple voltage on the V
LT1376 will be well behaved . The formula below will give
an estimate of V
loop, assuming that R
of C
G
If a computer simulation of the LT1376 showed that a
series compensation resistor of 3k gave best overall loop
response, with adequate gain margin, the resulting V
ripple voltage with V
L = 10µH, would be:
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (< 2k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phase response, and some means must be used to control
ripple voltage at the V
is to add a capacitor (C
on the V
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
add unacceptable phase shift at loop unity-gain frequency.
With R
V
MA
C RIPPLE
C
V
(
C
C RIPPLE
F
= Error amplifier transconductance (2000µMho)
(
at 500kHz.
=
C
C
( )( )( )
= 3k,
2
pin. Pole frequency for this capacitor is typically
)
π
=
)
( )
=
5
3
f R
( )
k
( )( )
10 10 10
C
R G
⎛
⎝
ripple voltage when R
C
C
2 10
⎛
⎝
•
IN
=
C
C
C
F
MA
) in parallel with the R
pin. The suggested way to do this
is large compared to the reactance
2
is held to less than 100mV
= 10V, V
•
−
π
3
(
⎛
⎝
V
⎞
⎠
( )( )( )
500 10
IN
−
V
(
10 5 0 1 2 4
6
IN
−
⎞
⎠
LT1375/LT1376
⎛
⎝
−
•
V
5
L f
OUT
500 10
OUT
)( )( )
3
= 5V, ESR = 0.1Ω,
)( )( )
⎞
⎠
•
.
( )
ESR
3
C
k
is added to the
3
⎞
⎠
.
C
=
/C
2 4 .
531
=
C
network
0 144
21
P-P
pF
.
13756fd
C
, the
pin
V