LTC1709EG-8 Linear Technology, LTC1709EG-8 Datasheet - Page 21

IC REG SW 2PH SYNC STPDWN 36SSOP

LTC1709EG-8

Manufacturer Part Number
LTC1709EG-8
Description
IC REG SW 2PH SYNC STPDWN 36SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1709EG-8

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
1.3 ~ 3.5 V
Current - Output
3A
Voltage - Input
4 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Frequency - Switching
-

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APPLICATIO S I FOR ATIO
1) I
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R
MOSFET can simply be summed with the resistances of L,
R
R
total resistance is 25m . This results in losses ranging
from 2% to 8% as the output current increases from 3A to
15A per output stage for a 5V output, or a 3% to 12% loss
per output stage for a 3.3V output. Efficiency varies as the
inverse square of V
and output power level. The combined effects of increas-
ingly lower output voltages and higher currents required
by high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
2) Transition losses apply only to the topside MOSFET(s),
and are significant only when operating at high input
voltages (typically 12V or greater). Transition losses can
be estimated from:
3) INTV
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from INTV
ground. The resulting dQ/dt is a current out of INTV
is typically much larger than the control circuit current. In
continuous mode, I
are the gate charges of the topside and bottom side
MOSFETs.
Supplying INTV
from an output-derived source will scale the V
required for the driver and control circuits by the ratio
(Duty Factor)/(Efficiency). For example, in a 20V to 5V
application, 10mA of INTV
mately 3mA of V
SENSE
DS(ON)
Transition Loss = (1.7) V
2
R losses are predicted from the DC resistances of the
and ESR to obtain I
CC
= 10m , R
current is the sum of the MOSFET driver and
CC
IN
power through the EXTV
L
OUT
current. This reduces the mid-current
U
GATECHG
= 10m , and R
DS(ON)
for the same external components
U
2
, then the resistance of one
CC
IN
R losses. For example, if each
= (Q
2
current results in approxi-
I
O(MAX)
T
+ Q
SENSE
W
B
), where Q
C
RSS
= 5m , then the
CC
f
switch input
U
IN
T
current
and Q
CC
SENSE
CC
that
to
B
,
loss from 10% or more (if the driver was powered directly
from V
4) The V
DC supply current given in the Electrical Characteristics
table, which excludes MOSFET driver and control cur-
rents; the second is the current drawn from the differential
amplifier output. V
(<0.1%) loss.
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses in the
design of a system. The internal battery and input fuse
resistance losses can be minimized by making sure that
C
the switching frequency. A 50W supply will typically
require a minimum of 200 F to 300 F of capacitance
having a maximum of 10m
LTC1709 2-phase architecture typically halves this input
capacitance requirement over competing solutions. Other
losses including Schottky conduction losses during dead-
time and inductor core losses generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
amount equal to I
series resistance of C
discharge C
forces the regulator to adapt to the current change and
return V
time V
ringing, which would indicate a stability problem. The
availability of the I
control loop behavior but also provides a DC coupled and
AC filtered closed loop response test point. The DC step,
rise time, and settling at this test point truly reflects the
closed loop response. Assuming a predominantly second
order system, phase margin and/or damping factor can be
IN
has adequate charge storage and a very low ESR at
OUT
IN
OUT
) to only a few percent.
IN
can be monitored for excessive overshoot or
current has two components: the first is the
OUT
to its steady-state value. During this recovery
generating the feedback error signal that
LTC1709-8/LTC1709-9
TH
IN
LOAD
OUT
pin not only allows optimization of
current typically results in a small
(ESR), where ESR is the effective
( I
LOAD
) also begins to charge or
to 20m
OUT
of ESR. The
shifts by an
21

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