LTC3788IGN-1#PBF Linear Technology, LTC3788IGN-1#PBF Datasheet - Page 13

IC CTLR BOOST 2PH DUAL 28SSOP

LTC3788IGN-1#PBF

Manufacturer Part Number
LTC3788IGN-1#PBF
Description
IC CTLR BOOST 2PH DUAL 28SSOP
Manufacturer
Linear Technology
Type
Step-Up (Boost)r
Datasheet

Specifications of LTC3788IGN-1#PBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
Adj to 60V
Current - Output
25A
Frequency - Switching
105kHz ~ 760kHz
Voltage - Input
4.5 ~ 38 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC3788IGN-1#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
OPERATION
The typical capture range of the LTC3788-1’s PLL is from
approximately 55kHz to 1MHz, and is guaranteed to
lock to an external clock source whose frequency is be-
tween 75kHz and 850kHz.
The typical input clock thresholds on the PLLIN/MODE
pin are 1.6V (rising) and 1.2V (falling).
Operation When V
When V
boost controller can behave differently depending on the
mode, inductor current and V
tinuous mode, the loop works to keep the top MOSFET
on continuously once V
charge pump delivers current to the boost capacitor to
maintain a suffi ciently high TG voltage.
In pulse-skipping mode, if V
of the regulated V
current rises above a certain threshold and turns off if the
inductor current falls below this threshold. This thresh-
old current is set approximately to 4% of the maximum
current. If the controller is programmed to Burst Mode
operation under this same V
off regardless of the inductor current.
If V
any mode, the controller turns on TG regardless of the
inductor current. In Burst Mode operation, however, the
internal charge pump turns off if the entire chip is asleep
(the other channel is asleep or shut down). With the charge
pump off, there would be nothing to prevent the boost
capacitor from discharging, resulting in an insuffi cient TG
voltage needed to keep the top MOSFET completely on.
To prevent excessive power dissipation across the body
diode of the top MOSFET in this situation, the chip can be
switched over to forced continuous mode to enable the
charge pump, or a Schottky diode can also be placed in
parallel to the top MOSFET.
IN
rises above 110% of the regulated V
IN
rises above the regulated V
OUT
IN
> V
voltage, TG turns on if the inductor
IN
OUT
rises above V
IN
IN
is between 100% and 110%
IN
window, then TG remains
voltage. In forced con-
OUT
OUT
OUT
. The internal
voltage, the
voltage in
Power Good
The PGOOD1 pin is connected to an open-drain of an in-
ternal N-channel MOSFET. The MOSFET turns on and pulls
the PGOOD1 pin low when the corresponding VFB1 pin
voltage is not within ±10% of the 1.2V reference voltage.
The PGOOD1 pin is also pulled low when the corresponding
RUN1 pin is low (shut down). When the VFB1 pin voltage
is within the ±10% requirement, the MOSFET is turned
off and the pin is allowed to be pulled up by an external
resistor to a source of up to 6V.
Operation at Low SENSE Pin Common Voltage
The current comparator in the LTC3788-1 is powered di-
rectly from the SENSE
mode voltage of SENSE
low as 2.5V, which is below the UVLO threshold. Figure 1
shows a typical application when the controller’s VBIAS
is powered from V
2.5V. If the voltage on SENSE
pin will be held low. When the SENSE voltage returns to
the normal operating range, the SS pin will be released,
initiating a new soft-start cycle.
BOOST Supply Refresh and Internal Charge Pump
Each top MOSFET driver is biased from the fl oating
bootstrap capacitor C
ing each cycle through an external diode when the bot-
tom MOSFET turns on. There are two considerations to
keep the BOOST supply at the required bias level. During
start-up, if the bottom MOSFET is not turned on within
100μs after UVLO goes low, the bottom MOSFET will be
forced to turn on for ~400ns. This forced refresh gener-
ates enough BOOST-SW voltage to allow the top MOSFET
ready to be fully enhanced instead of waiting for the initial
few cycles to charge up. There is also an internal charge
pump that keeps the required bias on BOOST. The charge
pump always operates in both forced continuous mode
and pulse-skipping mode. In Burst Mode operation, the
charge pump is turned off during sleep and enabled when
the chip wakes up. The internal charge pump can normally
supply a charging current of 55μA.
OUT
B
while V
+
, which normally recharges dur-
+
and SENSE
pin. This enables the common
IN
+
drops below 2.5V, the SS
supply can go as low as
LTC3788-1
pins to operate at as
13
37881fa

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