LTC3728LIGN#TRPBF Linear Technology, LTC3728LIGN#TRPBF Datasheet - Page 17
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LTC3728LIGN#TRPBF
Manufacturer Part Number
LTC3728LIGN#TRPBF
Description
IC REG SYNC DUAL 28-SSOP
Manufacturer
Linear Technology
Series
PolyPhase®r
Type
Step-Down (Buck)r
Datasheet
1.LTC3728LXCUHPBF.pdf
(36 pages)
Specifications of LTC3728LIGN#TRPBF
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.8 ~ 7 V
Current - Output
3A
Frequency - Switching
250kHz ~ 550kHz
Voltage - Input
4.5 ~ 28 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R
inductor values (higher ΔI
lower load currents, which can cause a dip in effi ciency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High effi ciency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mμ
size for a fi xed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and, therefore, copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates hard, which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive
than ferrite. A reasonable compromise from the same
manufacturer is Kool Mμ. Toroids are very space effi cient,
especially when using several layers of wire. Because
they generally lack a bobbin, mounting is more diffi cult.
However, designs for surface mount are available that do
not increase the height signifi cantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller in the LTC3728L/LTC3728LX: One N-channel
MOSFET for the top (main) switch, and one N-channel
MOSFET for the bottom (synchronous) switch.
®
cores. Actual core loss is independent of core
L
) will cause this to occur at
SENSE
. Lower
The peak-to-peak drive levels are set by the INTV
voltage. This voltage is typically 5V during start-up
(see EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected (V
< 5V); then, sublogic level threshold MOSFETs (V
< 3V) should be used. Pay close attention to the BV
specifi cation for the MOSFETs as well; most of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the
on-resistance R
voltage and maximum output current. Miller capacitance,
C
usually provided on the MOSFET manufacturers’ data
sheet. C
along the horizontal axis while the curve is approximately
fl at divided by the specifi ed change in V
then multiplied by the ratio of the application applied V
to the gate charge curve specifi ed V
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
The MOSFET power dissipations at maximum output
current are given by:
MILLER
Main Switch Duty Cycle =
P
P
Synchronous Switch Duty Cycle =
MAIN
SYNC
, can be approximated from the gate charge curve
MILLER
=
=
( )
CC
V
V
V
V
IN
V
INTVCC
OUT
IN
Pin Connection). Consequently, logic-level
LTC3728L/LTC3728LX
IN
2
– V
V
DS(ON)
is equal to the increase in gate charge
IN
(
I
I
MAX
OUT
MAX
1
– V
2
, Miller capacitance C
)
(
THMIN
2
I
MAX
(
(
R
1+
DR
)
V
+
2
V
)
OUT
)
(
(
IN
V
R
1+
C
THMIN
DS(ON)
MILLER
1
)
DS
R
V
IN
DS(ON)
. When the IC is
DS
+
)
( )
– V
V
•
f
. This result is
IN
MILLER
OUT
17
, input
GS(TH)
3728lxfe
DSS
DS
CC
IN