KSZ8993M Micrel Inc, KSZ8993M Datasheet - Page 15

• Manufacturer Part Number: KSZ8993M
• Description: IC SWITCH 10/100 3PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8993M

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Supply Voltage (min): 1.71/3.135V
• Power Dissipation: 800mW
• Supply Current: 0.1/0.19A
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1037

Micrel, Inc.
April 2005
Note:
1. I = Input.
Pin Number
100
101
102
103
O= Output.
Pin Name
PS1
PS0
PV31
PV32
Ipu = Input w/ internal pull-up.
Ipd = Input w/ internal pull-down.
Type
Ipd
Ipd
Ipu
Ipu
(1)
15
Description
Serial bus configuration pins to select mode of access to
KS8993M internal registers.
[PS1, PS0] = [0, 0] — I
(If EEPROM is not detected, the power-up default values of
the KS8993M internal registers will be used.)
[PS1, PS0] = [0, 1] — I
The external I
The KS8993M device addresses are:
1011_1111
1011_1110
[PS1, PS0] = [1, 0] — SPI slave mode
[PS1, PS0] = [1, 1] – SMI-mode
In this mode, the KS8993M provides access to all its internal
8 bit registers through its MDC and MDIO pins.
Note:
When (PS1, PS0) ≠ (1,1), the KS8993M provides access to
its 16 bit MIIM registers through its MDC and MDIO pins.
Port 3 port-based VLAN mask bits – Use to select which
ports may transmit packets received on port 3.
PV31 = 1, port 1 may transmit packets received on port 3
PV31 = 0, port 1 will not transmit any packets received on
port 3
PV32 = 1, port 2 may transmit packets received on port 3
PV32 = 0, port 2 will not transmit any packets received on
port 3
I/O = Bi-directional.
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
2
<read>
<write>
C master will drive the SCL clock.
Type
O
O
I/O
Ipu
Type
O
I
I/O
Ipu
Type
O
I
I
Ipu
2
2
C master (EEPROM) mode
C slave mode
Description
Not used (tri-stated)
I
I
Not used
Description
Not used (tri-stated)
I
I
Not used
Description
SPI data out
SPI clock
SPI data In
SPI chip select
2
2
2
2
C clock
C data I/O
C clock
C data I/O
KS8993M/ML/MI
M9999-041205