DS2411R+T&R Maxim Integrated Products, DS2411R+T&R Datasheet
DS2411R+T&R
Specifications of DS2411R+T&R
DS2411R+TR
Related parts for DS2411R+T&R
DS2411R+T&R Summary of contents
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... Data is transferred serially through the Dallas Semiconductor’s 1-Wire protocol. The external power supply is required, extending the operating voltage range of the device below typical 1-Wire devices. 1-Wire is a registered trademark of Maxim Integrated Products, Inc. Silicon Serial Number with V PIN CONFIGURATION ...
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ABSOLUTE MAXIMUM RATINGS* I/O Voltage to GND V Voltage to GND CC I/O, V Current CC Operating Temperature Range Junction Temperature Storage Temperature Range Soldering Temperature This is a stress rating only and functional operation of the device at ...
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PARAMETER I/O PIN, 1-Wire RESET, PRESENCE DETECT CYCLE Reset Low Time Presence-Detect High Time Presence-Detect Low Time Presence-Detect Fall Time Presence-Detect Sample Time I/O PIN, 1-Wire WRITE Write-0 Low Time Write-1 Low Time I/O PIN, 1-Wire READ Read Low Time ...
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I Note 11 represents the time required for the pullup circuitry to pull the voltage on I/O up from Note ...
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Figure 2. 1-WIRE CRC GENERATOR 1st 2nd 3rd STAGE STAGE STAGE Figure 3. DS2411 EQUIVALENT CIRCUIT Rx Tx 100 Ω MOSFET Figure 4. BUS MASTER CIRCUIT a) Open Drain BUS MASTER DS5000 ...
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TRANSACTION SEQUENCE The communication sequence for accessing the DS2411 through the 1-Wire bus is as follows: Initialization ROM Function Command Read Data INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The initialization ...
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Figure 5. ROM FUNCTIONS FLOW CHART Bus Master Tx ROM Function Command 33h N Read ROM Command? Y DS2411 Tx Family Code (1 Byte) DS2411 Tx Serial Number (6 Bytes) DS2411 Tx CRC Byte Bus Master Tx Reset Pulse OD ...
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SIGNALING The DS2411 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, and Read Data. Except for the ...
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INITIALIZATION PROCEDURE Figure 6. Reset and Presence Pulse M ASTER Tx R ESET PU LSE V PUP ASTER ILM RESISTO R READ/WRITE TIMING DIAGRAM Figure 7a. Write-One ...
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Slave to Master A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below V until the read low time t TLMIN DS2411 will start pulling the data line low; its internal ...
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NOISE SUPPRESSION SCHEME Figure 8 V PUP Case A 0V CRC GENERATION To validate the registration number transmitted from the DS2411, the bus master can generate a CRC value from the 8-bit family code and unique ...