MAX4987AETA+T Maxim Integrated Products, MAX4987AETA+T Datasheet - Page 7

• Manufacturer Part Number: MAX4987AETA+T
• Description: IC CTLR OVP USB ESD PROT 8-TDFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX4987AETA+T

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 8-TDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX4987AE/MAX4987BE have a 6.15V (typ) over-
voltage threshold (OVLO). When V
V
ACOK is an active-low open-drain output that asserts
low when V
(typ) debounce period. Connect a pullup resistor from
ACOK to the logic I/O voltage of the host system.
During a short-circuit fault, ACOK may deassert due to
V
The MAX4987AE/MAX4987BE feature thermal-shutdown
circuitry. The internal nFET switch turns off when the
junction temperature exceeds T
goes into a fault mode. The device exits thermal shut-
down after the junction temperature cools by +40°C (typ).
For most applications, bypass IN to GND with a 1µF
ceramic capacitor as close to the device as possible to
enable ±15kV HBM ESD protection on IN. If ±15kV HBM
ESD protection is not required, there is no capacitor
required at IN. If the power source has significant induc-
tance due to long lead length, take care to prevent over-
shoots due to the LC tank circuit and provide protection if
necessary to prevent exceeding the absolute maximum
rating on IN.
ESD performance depends on a number of conditions.
The MAX4987AE/MAX4987BE are specified for ±15kV
HBM ESD protection on the CD+, CD-, and IN pins
when IN is bypassed to ground with a 1µF ceramic
capacitor. The CD+ and CD- inputs are also protected
against ±15kV Air Gap and ±6kV contact IEC 61000-4-
2 ESD events.
Figure 3 shows the Human Body Model, and Figure 4
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, that is then discharged into the device through a
1.5kΩ resistor.
The IEC 61000-4-2 standard covers ESD testing and per-
formance of finished equipment. It does not specifically
refer to integrated circuits. The MAX4987AE/ MAX4987BE
OVLO
IN
not being in the valid operating voltage range.
, ACOK is high impedance.
UVLO
Applications Information
Thermal-Shutdown Protection
_______________________________________________________________________________________
Overvoltage Lockout (OVLO)
< V
IN
< V
IN Bypass Capacitor
ESD Test Conditions
OVLO
Human Body Model
SHDN
Overvoltage-Protection Controller
following the 30ms
IN
IEC 61000-4-2
and immediately
is greater than
ACOK
with USB ESD Protection
Figure 2. Autoretry Timing Diagram
Figure 3. Human Body ESD Test Model
Figure 4. Human Body Current Waveform
CURRENT
THROUGH
nFET SWITCH
nFET SWITCH
ON
AMPERES
VOLTAGE
SOURCE
HIGH-
DC
I
P
36.8%
100%
90%
10%
CHARGE CURRENT-
LIMIT RESISTOR
0
0
t
OFF
1MΩ
t
t
R
RETRY
RL
C
I
100pF
LIM
C s
STORAGE
CAPACITOR
CURRENT WAVEFORM
SWITCH OFF
TIME
RESISTANCE
DISCHARGE
1.5kΩ
R
D
t
DL
I r
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
nFET SWITCH
ON
DEVICE
UNDER
TEST
7