DS8102+ Maxim Integrated Products, DS8102+ Datasheet - Page 3

• Manufacturer Part Number: DS8102+
• Description: IC MODULATOR/DECODER 16-TSSOP
• Manufacturer: Maxim Integrated Products
• Type: Modulatorr

Specifications of DS8102+

• Applications: Energy Measurement
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Duty Cycle (max): 40 % to 60 %
• Input Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Output Voltage: 0.4 V
• Supply Current: 3.5 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-08102+XPX

ELECTRICAL CHARACTERISTICS (continued)
(V
Note 1: Specifications to -40°C are guaranteed by design and not production tested.
Note 2: Typical values are not guaranteed. These values are measured at room temperature, V
Note 3: These numbers are guaranteed by design and are not tested.
Note 4: Calculated as t
Note 5: Calculated as t
Note 6: Parameter specifications are based upon the presence of an external cubic sinc filter (as implemented in the MAXQ3108)
Note 7: f
Note 8: This is a function of input sampling capacitance (C
Note 9: Z
ANALOG-TO-DIGITAL CONVERTER DYNAMIC SPECIFICATIONS
DC Power-Supply Rejection Ratio
Signal-to-Noise Ratio
Total Harmonic Distortion
(to 21st Harmonic)
ANALOG-TO-DIGITAL CONVERTER INPUTS
Input Voltage Range
Input Sampling Capacitance
(Note 1)
Input Sampling Rate
Input Impedance to AGND for
8MHz (Note 8)
Differential Input Impedance for
8MHz (Note 9)
Input Bandwidth (-3dB)
External Reference Input Voltage
External Reference Input
Sampling Capacitance
Reference Input Sampling Rate
INTERNAL REFERENCE
Reference Output Voltage
Reference Output Temperature
Coefficient
DD
= 2.7V to 3.6V, T
for generating full ADC output codewords.
S
IN
PARAMETER
= f
(differential) = 2 x Z
CLK
/12. f
Dual Delta-Sigma Modulator and Encoder
_______________________________________________________________________________________
A
CLK
= -40°C to +85°C, f
WU1
WU2
is the system clock frequency.
= 1/f
= 1/f
IN
ICLK
ICLK
(single-ended).
SYMBOL
x 8192.
x 57,344.
SINAD
PSRR
V
THD
C
REF
f
f
IN
S
S
CLK
= 8MHz, V
V
100mV ripple on V
V
sinewave at 62.5Hz
V
sinewave at 62.5Hz
V
sinewave at 62.5Hz
AN0+, AN0-, AN1+, and AN1- to AGND
Gain = 1
Gain = 4
Gain = 16
Gain = 32
Clock at 8MHz (Note 7)
Gain = 1
Gain = 4
Gain = 16
Gain = 32
Gain = 1
Gain = 4
Gain = 16
Gain = 32
DD
DD
DD
DD
= 3.0V to 3.6V, AN0+ = AN0- = AGND,
= 3.6V, gain = 1, AN0 = 500mV
= 3.6V, gain = 32, AN0 = 20mV
= 3.6V, gain = 32, AN0 = 20mV
REF
IN
) and sampling frequency, and can be approximated as 6/(f
= internal, OSR = 128, unless otherwise noted.) (Note 1)
CONDITIONS
DD
P-P
P-P
P-P
,
,
,
DD
MIN
1.2
70
70
-1
= 3.3V.
(Note 2)
0.667
1500
TYP
23.4
46.9
1.25
0.67
1.24
±30
750
187
375
-95
95
85
85
16
32
47
94
1
4
7
2
MAX
-70
1.3
+1
1
CLK
ppm/°C
UNITS
x C
MHz
MHz
kHz
k
k
dB
dB
dB
pF
pF
V
V
V
IN
).
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