KS8995MI Micrel Inc, KS8995MI Datasheet - Page 12
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KS8995MI
Manufacturer Part Number
KS8995MI
Description
IC SWITCH 10/100 5PORT 128PQFP
Manufacturer
Micrel Inc
Specifications of KS8995MI
Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.9/2.6/3.6V
Operating Supply Voltage (min)
1.7/2.4/3V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
576-1017 - BOARD EVAL EXPERIMENT KS8995M
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
576-1020
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
KS8995M
Note:
1. P = Power supply
M9999-120403
Pin Number
I = Input
O = Output
I/O = Bi-directional
Gnd = Ground
Ipu = Input w/ internal pull-up
Ipd = Input w/ internal pull-down
Ipd/O = Input w/ internal pull-down during reset, output pin otherwise
Ipu/O = Input w/ internal pull-up during reset, output pin otherwise
PU = Strap pin pull-up
PD = Strap pin pull-down
Otri = Output tristated
NC = No Connect
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
Pin Name
SMRXD1
SMRXD0
SCONF1
SCONF0
LED5-2
LED5-1
LED5-0
LED4-2
LED4-1
LED4-0
LED3-2
LED3-1
GNDD
SCOL
SCRS
VDDC
Type
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Gnd
Ipd
Ipd
P
(1)
Port
5
5
5
4
4
4
3
3
Pin Function
Switch MII receive bit 1. Strap option: PD (default) = Switch MII in
100Mbps mode; PU = Switch MII in 10Mbps mode.
Switch MII receive bit 0; Strap option: LED Mode
PD (default) = Mode 0; PU = Mode 1. See “Register 11.”
LEDX_2
LEDX_1
LEDX_0
Switch MII collision detect
Switch MII carrier sense
Dual MII configuration pin
Pin# (91, 86, 87):
000
001
010
011
100
101
110
111
Dual MII configuration pin
Digital ground
1.8V digital core V
LED indicator 2. Strap option: Aging setup. See “Aging” section
PU (default) = Aging Enable; PD = Aging disable.
LED indicator 1. Strap option: PU (default): enable PHY MII I/F
PD: tristate all PHY MII output. See “pin# 86 SCONF1.”
LED indicator 0
LED indicator 2
LED indicator 1
LED indicator 0
LED indicator 2
LED indicator 1
12
DD
Switch MII
Disable, Otri
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Disable
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Mode 0
Lnk/Act
Fulld/Col
Speed
PHY [5] MII
Disable, Otri
Disable, Otri
Disable, Otri
Disable, Otri
Disable
PHY Mode MII
PHY Mode MII
PHY Mode MII
December 2003
Mode 1
100Lnk/Act
10Lnk/Act
Fulld
Micrel