KSZ8995MAL Micrel Inc, KSZ8995MAL Datasheet - Page 12

IC SWITCH 10/100 5PORT 128PQFP

KSZ8995MAL

Manufacturer Part Number
KSZ8995MAL
Description
IC SWITCH 10/100 5PORT 128PQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8995MAL

Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1607 - BOARD EVAL EXPERIMENT KSZ8995MA
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1040

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8995MAL
Manufacturer:
Micrel Inc
Quantity:
10 000
KS8995MA
M9999-051305
Note:
1. P = Power supply.
2. PU = Strap pin pull-up.
Pin Number
I = Input.
O = Output.
I/O = Bidirectional.
Gnd = Ground.
Ipu = Input w/ internal pull-up.
Ipd = Input w/ internal pull-down.
Ipd/O = Input w/ internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/ internal pull-up during reset, output pin otherwise.
NC = No connect.
PD = Strap pin pull-down.
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
Pin Name
SMRXD1
SMRXD0
SCONF1
SCONF0
LED5-2
LED5-1
LED5-0
LED4-2
LED4-1
LED4-0
LED3-2
LED3-1
GNDD
SCRS
VDDC
SCOL
Otri = Output tristated.
Fulld = Full duplex.
Type
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Gnd
Ipd
Ipd
P
(1)
Port
5
5
5
4
4
4
3
3
Pin Function
100Mbps mode; PU = switch MII in 10Mbps mode.
PD (default) = mode 0; PU = mode 1. See “Register 11.”
LEDX_2
LEDX_1
LEDX_0
Dual MII configuration pin.
Pin (91, 86, 87):
000
001
010
011
100
101
110
111
Dual MII configuration pin.
Digital ground.
1.8V digital core V
LED indicator 2. Strap option: aging setup. See “Aging” section.
PU (default) = aging enable; PD = aging disable.
LED indicator 1. Strap option: PU (default) = enable PHY MII I/F.
PD: tristate all PHY MII output. See “Pin 86 SCONF1.”
LED indicator 0
LED indicator 2
LED indicator 1
LED indicator 0
LED indicator 2
LED indicator 1
Switch MII receive bit 1. Strap option: PD (default) = switch MII in
Switch MII receive bit 0. Strap option: LED mode
Switch MII collision detect.
Switch MII carrier sense.
12
(2)
DD
.
Switch MII
Disable, Otri
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Disable
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Mode 0
Lnk/Act
Fulld/Col
Speed
PHY [5] MII
Disable, Otri
Disable, Otri
Disable, Otri
Disable, Otri
Disable
PHY Mode MII
PHY Mode MII
PHY Mode MII
Mode 1
100Lnk/Act
10Lnk/Act
Full duplex
Micrel, Inc.
May 2005

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