SI8420BB-D-IS Silicon Laboratories Inc, SI8420BB-D-IS Datasheet
SI8420BB-D-IS
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SI8420BB-D-IS Summary of contents
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... IEC 60950-1, 61010-1 (reinforced insulation ) Description Silicon Lab's family of ultra-low-power digital isolators are CMOS devices offering substantial data rate, propagation delay, power, size, reliability, and external BOM advantages when compared to legacy isolation technologies. The operating parameters of these products remain stable across wide temperature ranges throughout their service life ...
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Si8410/20/21 2 Rev. 1.3 ...
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T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Si8410/20/21 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Operating Temperature* Supply Voltage *Note: The maximum ambient temperature is dependent upon data frequency, output loading, the number of operating channels, and supply voltage. Table 2. Absolute Maximum Ratings ...
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Table 3. Electrical Characteristics ( ±10 ±10%, T DD1 DD2 A Symbol Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current 1 ...
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Si8410/20/21 Table 3. Electrical Characteristics (Continued ±10 ±10%, T DD1 DD2 A Parameter Symbol 10 Mbps Supply Current (All inputs = 5 MHz square wave all outputs) ...
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Table 3. Electrical Characteristics (Continued ±10 ±10%, T DD1 DD2 A Parameter Symbol Si8410Bx, Si8420Bx, Si8421Bx Maximum Data Rate Minimum Pulse Width Propagation Delay t PHL Pulse Width Distortion | ...
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Si8410/20/21 Table 4. Electrical Characteristics (V = 3.3 V ±10 3.3 V ±10%, T DD1 DD2 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current 1 Output ...
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Table 4. Electrical Characteristics (Continued 3.3 V ±10 3.3 V ±10%, T DD1 DD2 Parameter 10 Mbps Supply Current (All inputs = 5 MHz square wave all outputs) Si8410Bx V DD1 ...
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Si8410/20/21 Table 4. Electrical Characteristics (Continued 3.3 V ±10 3.3 V ±10%, T DD1 DD2 Parameter Si8410Bx, Si8420Bx, Si8421Bx Maximum Data Rate Minimum Pulse Width Propagation Delay Pulse Width Distortion |t – PLH PHL ...
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Table 5. Electrical Characteristics ( –40 to 125 °C) DD1 DD2 A Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage ...
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Si8410/20/21 Table 5. Electrical Characteristics ( –40 to 125 °C) DD1 DD2 A Parameter 10 Mbps Supply Current (All inputs = 5 MHz square wave all ...
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Table 5. Electrical Characteristics ( –40 to 125 °C) DD1 DD2 A Parameter Si8410Bx, Si8420Bx, Si8421Bx Maximum Data Rate Minimum Pulse Width Propagation Delay Pulse Width Distortion | ...
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Si8410/20/21 Table 7. Insulation and Safety-Related Specifications Parameter 1 Nominal Air Gap (Clearance) Nominal External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Proof Tracking Index) Erosion Depth 2 Resistance (Input-Output) 2 Capacitance (Input-Output) 3 Input Capacitance Notes: 1. ...
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Table 9. IEC 60747-5-2 Insulation Characteristics for Si84xxxB* Parameter Maximum Working Insulation Voltage Input to Output Test Voltage Transient Overvoltage Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance 500 *Note: Maintenance ...
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Si8410/20/21 Table 11. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance 400 320 300 270 200 160 100 0 0 Figure 2. (NB SOIC-8) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 16 Symbol ...
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Functional Description 2.1. Theory of Operation The operation of an Si84xx channel is analogous to that of an opto coupler, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path and ...
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Si8410/20/21 2.2. Eye Diagram Figure 5 illustrates an eye-diagram taken on an Si8410. For the data source, the test used an Anritsu (MP1763C) Pulse Pattern Generator set to 1000 ns/div. The output of the generator's clock and data from an ...
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Device Operation Device behavior during start-up, normal operation, and shutdown is shown in Table 12. Table 12. Si84xx Logic Operation Table 1,4 1,2,3 V Input VDDI State VDDO State ...
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Si8410/20/21 2.4. Layout Recommendations To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V (creepage/clearance component, such as ...
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Typical Performance Characteristics The typical performance characteristics depicted in the following diagrams are for information purposes only. Refer to Tables 3, 4, and 5 for actual specification limits ...
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Si8410/20/21 Figure 12. Si84xx Time-Dependent Dielectric Breakdown 22 Rev. 1.3 ...
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... Power Supply Bypass Capacitors (Revision C and Revision D) When using the ISOpro isolators with power supplies > 4.5 V, sufficient VDD bypass capacitors must be present on both the VDD1 and VDD2 pins to ensure the VDD rise time is less than 0.5 V/µs (which is > 9 µs for a > 4.5 V supply). Although rise time is power supply dependent, > ...
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Si8410/20/21 4. Pin Descriptions V V DD1 DD2 GND2/NC l XMITR /NC B1 DD1 i RCVR o n GND1 GND2 Si8410 NB SOIC-8 Name SOIC-8 Pin# Si8410 V /NC* 1,3 DD1 ...
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... Ordering Guide Revision D devices are recommended for all new designs. Table 14. Ordering Guide for Valid OPNs Ordering Part Number of Number (OPN) Inputs VDD1 Side 2 Revision D Devices Si8410AB-D-IS 1 Si8410BB-D-IS 1 Si8420AB-D-IS 2 Si8420BB-D-IS 2 Si8421AB-D-IS 1 Si8421BB-D- Revision C Devices Si8410AB-C-IS 1 Si8410BB-C-IS 1 Si8420AB-C-IS 2 Si8420BB-C-IS 2 Si8421AB-C-IS 1 Si8421BB-C-IS 1 Notes: 1. All packages are RoHS-compliant. Moisture sensitivity level is MSL2A with peak reflow temperature of 260 ° ...
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Si8410/20/21 6. Package Outline: 8-Pin Narrow Body SOIC Figure 13 illustrates the package details for the Si841x. Table 15 lists the values for the dimensions shown in the illustration. Figure 13. 8-pin Small Outline Integrated Circuit (SOIC) Package Table 15. ...
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Land Pattern: 8-Pin Narrow Body SOIC Figure 14 illustrates the recommended land pattern details for the Si841x in an 8-pin narrow-body SOIC. Table 16 lists the values for the dimensions shown in the illustration. Figure 14. PCB Land Pattern: ...
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Si8410/20/21 8. Top Marking Line 1 Marking: Base Part Number Ordering Options (See Ordering Guide for more information). Line 2 Marking Year WW = Workweek R = Product (OPN) Revision F = Wafer Fab Line 3 Marking: Circle ...
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... OCUMENT HANGE IST Revision 0.11 to Revision 0.21 Rev 0.21 is the first revision of this document that applies to the new series of ultra low power isolators featuring pinout and functional compatibility with previous isolator products. Updated “1. Electrical Specifications”. Updated “5. Ordering Guide”. ...
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