SI8401AB-B-IS Silicon Laboratories Inc, SI8401AB-B-IS Datasheet
SI8401AB-B-IS
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SI8401AB-B-IS Summary of contents
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... Silicon Labs proprietary RF isolation technology and offer shorter propagation delays, lower power consumption, smaller installed size, and more stable operation with temperature and age versus opto couplers or other digital isolators. All devices in this family include hot-swap, bidirectional SDA and SCL isolation channels with open-drain sink capability and operate to a maximum frequency of 1.7 MHz. The 8-pin version (Si8400) supports bidirectional SDA and SCL isolation ...
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Si840x 2 Rev. 1.3 ...
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T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Si840x 1. Electrical Specifications Table 1. Absolute Maximum Ratings Parameter 2 Storage Temperature Ambient Temperature Under Bias 3 Supply Voltage (Revision A) 3 Supply Voltage (Revision B) Input Voltage Output Voltage 2 Output Current Drive (non-I C channels) 2 Side ...
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Table 3. Si8400/01/02/05 Electrical Characteristics for Bidirectional I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C unless otherwise noted. Parameter Logic Levels Side A 2 Logic Input Threshold 3 Logic ...
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Si840x Table 3. Si8400/01/02/05 Electrical Characteristics for Bidirectional I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C unless otherwise noted. Parameter Timing Specifications (Measured at 1.40 V Unless Otherwise Specified) ...
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Table 4. Electrical Characteristics for Unidirectional Non-I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C Parameter Symbol High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low ...
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Si840x Table 5. Electrical Characteristics for All I 3.0 V < VDD < 5 –40 to +125 °C. Typical specs at 25 °C Parameter VDD Undervoltage Threshold VDD Negative-going Lockout Hysteresis Common Mode Transient Immunity Shut Down ...
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Table 6. Regulatory Information* CSA The Si84xx is certified under CSA Component Acceptance Notice 5A. For more details, see File 232873. 61010- 300 V reinforced insulation working voltage 600 V RMS 60950- 130 V ...
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Si840x Table 8. IEC 60664-1 (VDE 0844 Part 2) Ratings Parameter Basic Isolation Group Installation Classification Table 9. IEC 60747-5-2 Insulation Characteristics for Si84xxxB* Parameter Maximum Working Insulation Voltage Input to Output Test Voltage Transient Overvoltage Pollution Degree (DIN VDE ...
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Table 11. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance 400 300 270 200 160 100 0 0 Figure 3. NB SOIC-8 Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 500 400 350 300 ...
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Si840x 2. Functional Description 2.1. Theory of Operation The operation of an Si84xx channel is analogous to that of an opto coupler, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path ...
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Device Operation Device behavior during start-up, normal operation, and shutdown is shown in Figure 7, where UVLO+ and UVLO- are the positive-going and negative-going thresholds respectively. Refer to Table 12 to determine outputs when power supply (VDD) is not ...
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Si840x 3.3. Input and Output Characteristics for Non-I The Si84xx inputs and outputs for unidirectional channels are standard CMOS drivers/receivers. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the ...
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Typical Performance Characteristics The typical performance characteristics depicted in the following diagrams are for information purposes only. Refer to Tables and 5 for actual specification limits. Side A Side B 2 Figure Side ...
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Si840x Figure 13. Si84xx Time-Dependent Dielectric Breakdown 16 Rev. 1.3 ...
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Layout Recommendations To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V (creepage/clearance component, such as a ...
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... At first glance, it appears that SDA and SCL can be isolated simply by placing two unidirectional isolators in parallel, and in opposite directions. However, this technique creates feedback that latches the bus line low when a logic low asserted by either master or slave. This problem can be remedied by adding anti-latch circuits, but results in a larger and more expensive solution ...
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... Isolator V = 0.825 V maximum, OL (0.5 mA pullup, –10 to 125 ° Isolation with Digital Isolators” for additional Rev. 1.3 Si840x Effect of Bus Pull-up Strength and Temperature This is normally guaranteed by the isolator data sheet. However, if the pull up strength is too weak, the out- put low voltage will fall and can get too close to the input low logic level ...
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Si840x Figures 15, 16, and 18 illustrate typical circuit configurations using the Si8400, Si8401, and Si8405. AVDD 0.1 µ ASDA ASCL AGND Figure 15. Typical Si8400 Application Diagram AVDD 0.1 µ ASDA ASCL AGND Figure 16. ...
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AVDD 1 0.1 µ ASDA 3 3 RESET 4 Micro- 5 controller 6 ASCL 7 8 AGND Figure 18. Typical Si8405 Application Diagram 16 0.1 µ Micro- 13 controller 12 INT 11 10 BGND ...
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... Power Supply Bypass Capacitors (Revision A and Revision B) When using the ISOpro isolators with power supplies > 4.5 V, sufficient VDD bypass capacitors must be present on both the VDD1 and VDD2 pins to ensure the VDD rise time is less than 0.5 V/µs (which is > 9 µs for a > 4.5 V supply). Although rise time is power supply dependent, > ...
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Pin Descriptions AVDD 1 Bidirectional 2 ASDA Isolator Channel Bidirectional 3 ASCL Isolator Channel 4 AGND Si8400 Table 14. Si8400/01/02 in SO-8 Package Pin Name 1 AVDD Side A power supply terminal; connect to a source of 3.0 to ...
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Si840x ADOUT Table 15. Si8405 in Narrow-Body SO-16 Package Pin Name 1 AVDD Side A Power Supply Terminal. Connect to a source of 3 connection. 3 ASDA Side A Data (open drain) Input or ...
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... Revision B devices are recommended for all new designs. Ordering Part Number of Max I Number Bidirection Bus Speed Channels (MHz) 2 Revision B Devices Si8400AA-B-IS 2 1.7 Si8400AB-B-IS 2 1.7 Si8401AA-B-IS 1 1.7 Si8401AB-B-IS 1 1.7 Si8402AB-B-IS 1 1.7 Si8405AA-B-IS1 2 1.7 Si8405AB-B-IS1 2 1.7 2 Revision A Devices Si8400AA-A-IS 2 1.7 Si8400AB-A-IS 2 1.7 Si8405AA-A-IS1 2 1.7 Si8405AB-A-IS1 2 1 ...
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Si840x 9. Package Outline: 8-Pin Narrow Body SOIC Figure 19 illustrates the package details for the Si840x in an 8-pin SOIC (SO-8). Table 17 lists the values for the dimensions shown in the illustration. Figure 19. 8-pin Small Outline Integrated ...
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Land Pattern: 8-Pin Narrow Body SOIC Figure 20 illustrates the recommended land pattern details for the Si840x in an 8-pin narrow-body SOIC. Table 18 lists the values for the dimensions shown in the illustration. Figure 20. PCB Land Pattern: ...
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Si840x 11. Package Outline: 16-Pin Narrow Body SOIC Figure 21 illustrates the package details for the Si840x in a 16-pin narrow-body SOIC (SO-16). Table 19 lists the values for the dimensions shown in the illustration. Figure 21. 16-pin Small Outline ...
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Table 19. Package Diagram Dimensions (Continued) Dimension Min h 0.25 θ 0° aaa bbb ccc ddd Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to ...
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Si840x 12. Land Pattern: 16-Pin Narrow Body SOIC Figure 22 illustrates the recommended land pattern details for the Si840x in a 16-pin narrow-body SOIC. Table 20 lists the values for the dimensions shown in the illustration. Figure 22. 16-Pin Narrow ...
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Top Marking: 8-Pin Narrow Body SOIC Figure 23. 8-Pin Narrow Body SOIC Top Marking Table 21. 8-Pin Narrow Body SOIC Top Marking Table Line 1 Marking: Base Part Number Ordering Options (See Ordering Guide for more information). Line 2 ...
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Si840x 14. Top Marking: 16-Pin Narrow Body SOIC Figure 24. 16-Pin Narrow Body SOIC Top Marking Table 22. 16-Pin Narrow Body SOIC Top Marking Table Line 1 Marking: Base Part Number Ordering Options Line 2 Marking: Circle = 1.2 mm ...
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OCUMENT HANGE IST Revision 0.1 to Revision 1.0 Updated document to reflect availability of Revision B silicon. Updated Tables and 5. Updated all supply currents and timing parameters. Revised logic low ...
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