HCPL-7720#560 Avago Technologies US Inc., HCPL-7720#560 Datasheet - Page 17

• Manufacturer Part Number: HCPL-7720#560
• Description: OPTOCOUPLER 25MBD 8NS VDE 8-SMD
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-7720#560

• Package / Case: 8-SMD Gull Wing
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 10mA
• Data Rate: 25MBd
• Propagation Delay High - Low @ If: 20ns
• Input Type: Logic
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Surface Mount, Gull Wing
• Isolation Voltage: 3750 Vrms
• Maximum Continuous Output Current: 10 mA
• Maximum Fall Time: 8 ns
• Maximum Rise Time: 9 ns
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 25 MBps
• Maximum Power Dissipation: 150 mW
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DRAIN/SHIELD
DRAIN/SHIELD
Figure 19. Isolated node with transceiver powered by the network.
Isolated Node Providing Power to the Network
Figure 20 shows a node providing power to the network.
The AC line powers a regulator which provides five (5)
volts locally. The AC line also powers a 24 volt isolated
supply, which powers the network, and another five-volt
regulator, which, in turn, powers the transceiver and iso-
lated (network) side of the two optocouplers. This meth-
od is recommended when there are a limited number of
devices on the network that don’t require much power,
thus eliminating the need for separate power supplies.
Figure 20. Isolated node providing power to the network.
17
SIGNAL
POWER
SIGNAL
POWER
NETWORK
SUPPLY
POWER
DEVICENET NODE
772x/072x
772x/072x
NODE/APP SPECIFIC
HCPL
NODE/APP SPECIFIC
HCPL
TRANSCEIVER
TRANSCEIVER
uP/CAN
* OPTIONAL FOR BUS V + SENSE
uP/CAN
772x/072x
772x/072x
HCPL
HCPL
5 V REG.
5 V REG.
772x/072x
NON ISO
*HCPL
REG.
5 V
AC LINE
SWITCHING
ISOLATED
SUPPLY
POWER
V+ (SIGNAL)
V– (SIGNAL)
V+ (POWER)
V– (POWER)
More importantly, the unique “dual-inverting” design of
the HCPL-772X/072X ensure the network will not “lock-
up” if either AC line power to the node is lost or the node
powered-off. Specifically, when input power (V
HCPL-772X/072X located in the transmit path is eliminat-
ed, a RECESSIVE bus state is ensured as the HCPL-772X/
072X output voltage (V
AC LINE
GALVANIC
ISOLATION
BOUNDARY
V+ (SIGNAL)
V– (SIGNAL)
V+ (POWER)
V– (POWER)
GALVANIC
ISOLATION
BOUNDARY
O
) go HIGH.
DD1
) to the