HCPL-7721-020 Avago Technologies US Inc., HCPL-7721-020 Datasheet - Page 8

• Manufacturer Part Number: HCPL-7721-020
• Description: OPTOCOUPLER 25MBD 6NS UL 8-DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-7721-020

• Package / Case: 8-DIP (0.300", 7.62mm)
• Voltage - Isolation: 5000Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 10mA
• Data Rate: 25MBd
• Propagation Delay High - Low @ If: 20ns
• Input Type: Logic
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Through Hole
• Isolation Voltage: 5000 Vrms
• Maximum Continuous Output Current: 10 mA
• Maximum Fall Time: 8 ns
• Maximum Rise Time: 9 ns
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 25 MBps
• Maximum Power Dissipation: 150 mW
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Electrical Specifications
Test conditions that are not specified can be anywhere within the recommended operating range.
All typical specifications are at T
8
Parameter
DC Specifications
Logic Low Input
Supply Current
Logic High Input
Supply Current
Output Supply Current
Input Current
Logic High Output
Voltage
Logic Low Output
Voltage
Switching Specifications
Propagation Delay Time
to Logic Low Output
Propagation Delay Time
to Logic High Output
Pulse Width
Data Rate
Pulse Width Distortion
|t
Propagation Delay Skew
Output Rise Time
(10 - 90%)
Output Fall Time
(90 - 10%)
Common Mode
Transient Immunity at
Logic High Output
Common Mode
Transient Immunity at
Logic Low Output
Input Dynamic Power
Dissipation
Capacitance
Output Dynamic Power
Dissipation
Capacitance
PHL
- t
PLH
|
Symbol
I
I
I
I
I
V
V
t
t
PW
PWD
t
t
t
|CM
|CM
C
C
DD1L
DD1H
DD2L
DD2H
I
PHL
PLH
PSK
R
F
OH
OL
PD1
PD2
A
H
L
= +25°C, V
|
|
Min.
–10
4.4
4.0
40
7721/0721 3
7720/0720 3
10
10
DD1
= V
DD2
Typ.
6.0
1.5
5.5
7.0
5.0
4.8
0
0.5
20
23
9
8
20
20
60
10
= +5 V.
Max.
10.0
3.0
9.0
9.0
10
0.1
0.1
1.0
40
40
25
6
8
20
Units
mA
mA
mA
μA
V
V
V
ns
MBd
ns
ns
ns
ns
kV/μs
pF
Test Conditions
V
V
I
I
I
I
I
C
CMOS Signal Levels
V
0.8 V
V
V
V
O
O
O
O
O
CM
CM
I
I
L
I
I
= V
= 400 μA, V
= 0 V
= -20 μA, V
= -4 mA, V
= 20 μA, V
= 4 mA, V
= V
= 0 V, V
= 15 pF
= 1000 V
= 1000 V
DD1
DD1
DD1
,
, V
O
O
> 0.8 V,
I
>
I
I
= V
I
I
= V
= V
= V
= V
IL
IL
IH
IL
IH
Fig.
1, 2
3, 6
7
Note
2
3
4
5
6
7