HCPL-5150-200 Avago Technologies US Inc., HCPL-5150-200 Datasheet - Page 14

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HCPL-5150-200

Manufacturer Part Number
HCPL-5150-200
Description
OPTOCOUPLER IGBT 0.5A SLDR 8-DIP
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HCPL-5150-200

Mounting Type
Through Hole
Voltage - Isolation
1500VDC
Number Of Channels
1, Unidirectional
Current - Output / Channel
400mA
Propagation Delay High - Low @ If
300ns @ 10mA ~ 18mA
Current - Dc Forward (if)
25mA
Input Type
DC
Output Type
Push-Pull, Totem-Pole
Package / Case
8-DIP (0.300", 7.62mm)
No. Of Channels
1
Optocoupler Output Type
Gate Drive
Input Current
18mA
Output Voltage
30V
Opto Case Style
DIP
No. Of Pins
8
Propagation Delay
0.5µs
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
The open collector drive circuit, shown in Figure 31,
cannot keep the LED off during a +dV
since all the current flowing through C
supplied by the LED, and it is not recommended for appli-
cations requiring ultra high CMR
is an alternative drive circuit which, like the recommend-
ed application circuit (Figure 25), does achieve ultra high
CMR performance by shunting the LED in the off state.
CMR with the LED On (CMR
A high CMR LED drive circuit must keep the LED on
during common mode transients. This is achieved by
overdriving the LED current beyond the input threshold
so that it is not pulled below the threshold during a
transient. A minimum LED current of 10 mA provides
adequate margin over the maximum I
achieve 10 kV/ms CMR.
CMR with the LED Off (CMRL).
A high CMR LED drive circuit must keep the LED off (V
≤ V
during a -dV
flowing through C
V
developed across the logic gate is less than V
LED will remain off and no common mode failure will
occur.
4
+5 V
Figure 30. Equivalent Circuit for Figure 25 During Common Mode Transient
Figure 31. Not Recommended Open Collector Drive Circuit
SAT
F(OFF)
+5 V
Q1
of the logic gate. As long as the low state voltage
V
+
_
SAT
) during common mode transients. For example,
* THE ARROWS INDICATE THE DIRECTION
OF CURRENT FLOW DURING -dV CM /dt
1
2
3
4
1
2
3
4
CM
/dt transient in Figure 30, the current
C
C
C
C
I
I
LEDN
LEDP
LEDN
LEDP
LEDP
LEDN
LEDP
SHIELD
SHIELD
also flows through the R
V CM
+
H
_
).
L
performance. Figure 32
8
7
6
5
8
7
6
5
FLH
CM
LEDN
/dt transient,
of 7 mA to
0.1
µF
must be
F(OFF)
+
_
SAT
Rg
V CC = 18 V
and
, the
F
* * *
* * *
Figure 32. Recommended LED Drive Circuit for Ultra-High CMR
IPM Dead Time and Propagation Delay Specifications.
The HCPL-5150 includes a Propagation Delay Difference
(PDD) specification intended to help designers minimize
“dead time” in their power inverter designs. Dead time
is the time period during which both the high and low
side power transistors (Q1 and Q2 in Figure 25) are off.
Any overlap in Q1 and Q2 conduction will result in large
currents flowing through the power devices between the
high and low voltage motor rail.
To minimize dead time in a given design, the turn on of
LED2 should be delayed (relative to the turn off of LED1)
so that under worst-case conditions, transistor Q1 has
just turned off when transistor Q2 turns on, as shown in
Figure 33. The amount of delay necessary to achieve this
condition is equal to the maximum value of the propa-
gation delay difference specification, P
specified to be 350 ns over the operating temperature
range of -55°C to 125°C.
Delaying the LED signal by the maximum propagation
delay difference ensures that the minimum dead time is
zero, but it does not tell a designer what the maximum
dead time will be. The maximum dead time is equivalent
to the difference between the maximum and minimum
propagation delay difference specifications as shown in
Figure 34. The maximum dead time for the HCPL-5150 is
700 ns (= 350 ns - (-350 ns)) over an operating tempera-
ture range of -55°C to 125°C.
Note that the propagation delays used to calculate PDD
and dead time are taken at equal temperatures and test
conditions since the optocouplers under consideration
are typically mounted in close proximity to each other
and are switching identical IGBTs.
+5 V
1
2
3
4
C
C
LEDP
LEDN
SHIELD
8
7
6
5
DDMAX
, which is

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