SMC256BFJ6E NUMONYX, SMC256BFJ6E Datasheet - Page 18
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SMC256BFJ6E
Manufacturer Part Number
SMC256BFJ6E
Description
MEMORY CARD 256MB COMPACT FLASH
Manufacturer
NUMONYX
Datasheet
1.SMC04GBFK6E.pdf
(90 pages)
Specifications of SMC256BFJ6E
Memory Size
256MB
Memory Type
CompactFLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SMC256BFJ6E
Manufacturer:
MEMORY
Quantity:
20 000
Electrical interface
Table 9.
18/90
–CD1, –CD2
(PC card memory mode)
–CD1, –CD2
(PC card I/O mode)
–CD1, –CD2
(True IDE mode)
–CE1, –CE2
(PC card memory mode)
–CE1, –CE2
(PC card I/O mode)
–CS0, –CS1
(True IDE mode)
–CSEL
(PC card memory mode)
–CSEL
–CSEL
–IOWR
(PC card memory mode)
–IOWR
–IOWR
–OE
(PC card memory mode)
–OE
–ATASEL
(True IDE mode)
(PC card I/O mode)
(True IDE mode)
(PC card I/O mode)
(True IDE mode)
(PC card I/O mode)
Signal name
Signal descriptions (continued)
Dir.
O
I
I
I
I
26,25
7,32
Pin
39
35
9
These are connected to ground on the card. They are used
by the host to determine that the card is fully inserted into its
socket.
Same for all modes.
Same for all modes.
Used to select the card and to indicate whether a byte or a
word operation is being performed. –CE2 accesses the odd
Byte, –CE1 accesses the even byte or the odd byte
depending on A0 and –CE2. A multiplexing scheme based
on A0, –CE1, –CE2 allows 8-bit hosts to access all data on
D0 to D7.
Same as PC card memory mode.
–CS0 is the chip select for the task file registers, while –CS1
selects the alternate status register and the device control
register.
When –DMACK is asserted, -CS0 and –CS1 must be de-
asserted and data width is 16 bits.
Not used.
Not used.
This internally pulled up signal is used to configure the card
as a master or slave. When grounded it is configured as a
master, when open it is configured as a slave.
Not used.
The I/O write strobe pulse is used to clock I/O data on the
bus into the card controller registers. Clocking occurs on the
rising edge.
Same as PC card I/O mode.
This is an Output Enable strobe generated by the host
interface. It reads data and the CIS and configuration
registers.
Reads the CIS and configuration registers.
This input signal must be driven Low to enable true IDE
mode.
Description
SMCxxxBF