PCM18XP1 Microchip Technology, PCM18XP1 Datasheet - Page 39

MODULE PROC18F4580/4680,1/2680,1

PCM18XP1

Manufacturer Part Number
PCM18XP1
Description
MODULE PROC18F4580/4680,1/2680,1
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XP1

Accessory Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F2680/2681/4680/4681
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
INTERFACE – LIN Transceiver Products
MCP201
INTERFACE – Serial Peripherals
MCP23008
MCP23S08
MCP23016
MCP23017
MCP23S17
INTERFACE – Passive Access Products
MCP2030
NOTE 1: Can withstand 40V load dump.
Part #
Part #
Part #
Current Analog/
LIN Transceiver with integrated V
Voltage (V)
Operating
1.8 to 3.6
Interface
Family
8-bit I/O Port Expander
8-bit I/O Port Expander
16-bit I/O Port Expander
16-bit I/O expander
16-bit I/O expander
Description
Description
Temp. Range
Operating
-40 to +85
(°C)
REG
Operating Voltage
Vreg Output Voltage
Bus Type
SPI
4.75 to 5.25
1.8 to 5.5
1.8 to 5.5
2.0 to 5.5
1.8 to 5.5
1.8 to 5.5
(V)
(V)
RF Carrier
Frequency
Temperature Range
125 kHz
Temperature Range
-40 to +125
-40 to +125
Operating
-40 to +85
-40 to +85
-40 to +85
-40 to +125
(°C)
Operating
(°C)
Data Format
NRZ
Bus Type
Vreg Output Current
I
I
I
2
2
2
SPI
SPI
C™
C™
C™
Three axis signal conditioning devices for passive access applications,
high-sensitivity, configurable smart wake-up filter
(mA)
50
Max. Bus Frequency
10,000
10000
(kHz)
1,700
1700
400
V
CC
7.4 to 18
Range (V)
Features
(1)
3 HW address pins, HW interrupt,
25 mA source/sink capability per I/O
2 HW address pins, HW interrupt,
25 mA source/sink capability per I/O
3 H/W address inputs, HW interrupt,
25 mA source/sink capability per I/O
3 HW address pins, 25 mA sink/source
per I/O, 100 kHz,
400 kHz and 3-4 MHz I
Interrupt output
3 HW address pins, 25 mZ sink/source
per I/O, Interrupt output
Max Baud Rate
20 Kbaud
Features
2
C™ supported,
LIN Specification
Revision 1.2
Supported
14-Pin PDIP, 14-Pin SOIC, 14-Pin TSSOP
18-Pin PDIP, 18-Pin SOIC, 20-Pin SSOP, 20-
Pin 4x4 QFN
18-Pin PDIP, 18-Pin SOIC, 20-Pin SSOP, 20-
Pin 4x4 QFN
28-Pin PDIP, 28-Pin SOIC, 28-Pin SSOP,
28-Pin 6x6 QFN
28-Pin PDIP, 28-Pin SOIC, 28-Pin SSOP,
28-Pin QFN
28-Pin PDIP, 28-Pin SOIC, 28-Pin SSOP,
28-Pin QFN
8-pin PDIP, 8-pin SOIC, 8-Pin DFN
Packages
Packages
Packages
PAGE 37

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