ATAVRSB201 Atmel, ATAVRSB201 Datasheet - Page 7

• Manufacturer Part Number: ATAVRSB201
• Description: KIT REF FOR AVR SMART BATTERY
• Manufacturer: Atmel
• Series: AVR®r

Specifications of ATAVRSB201

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ATmega16HVA
• Primary Attributes: 1 ~ 4 Cells- Li-Ion, 8.4V, 880mA
• Processor To Be Evaluated: ATmega16HVA
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 9-1. Schematics for SB201.
8131A-AVR-10/08
A
B
C
D
LOGO1
AVR_LOGO_OVERLAY_3MM
Y = (I0)•(I2) + (I1)•(I2)
Cell-balancing
R25
0R
GND_ID
AVR
_ _
Mount for 2 cell application
2-Input NAND with inverted A Input
3MM
2-Input AND
1
1
3
1
6
3
1
6
R26
0R
R8
470R
R14
470R
I0
I1
I2
I0
I1
I2
GND_ID
GND_ID
PV2R
PV1R
CELL-
2-Input AND
Mount for 1 cell application
3
3
LOGO2
ATMEL_LOGO_OVERLAY
Y
Y
Mount for 2 cell application
PGND
PGND
ATMEL
VCC_ID
U1
NC7SZ57P6X
U2
NC7SZ57P6X
4
4
R3
10k
R12
10k
1
1
ID_Y1
CELL2_BAL_ON
CELL1_BAL_ON
R21
R7
R22
R13
GND_ID
J10
J12
ID_Y2
10k
10k
C2BO
0R
C1BO
0R
C1
100n
PGND
PGND
CELL-
PV2R
C2BO
MISO
PV1R
C1BO
MOSI
2
2
PCB1
A08-0483
PB3
PB2
Mount for 1 cell application
GND_ID
GND - PGND connection close to RSENSE
PGND
PGND
PCB2
A08-0482
R18
WSL0805R0100FEA
Net Tie
3
3
PGND
PGNDGND
R9
0R
R2
470R
R11
470R
R16
470R
R17
100R
R19
100R
GND
VCC_ID
ID_Y2
ID_Y1
ID_B
ID_A
PCB Edge-connector to SB200
C2
100n
C3
100n
C5
100n
Mount for 2 cell application
CELL-
4
4
CELL-
PV1R
J6
PV2
PV1
NV
PI
NI
J1
J2
PV2R
Remove when using SB200
R24
C8
220n
C9
220n
0R
VFET
J7
PGND
PACK-
J8
2.2uF/10V
Assembly Variant:
VREG
CELL+
C6
Variant name is not interpreted until output
GND
5
5
U3
A2
A3
A4
D1
D2
B4
C4
B1
B2
C3
C5
GND
J3
VFET
Charge & Discharge MOSFETs
3
2
PV2
PV1
NV
PI
NI
CF1P
CF1N
CF2P
CF2N
VREG
VCC
CELL+
PACK+
VREG
C7
100n
Q1
PMWD15UN
R4
1k
C11
100n
VREG
J17
ESD
Remove C10 to use debugWire
GND
(ADC1/SGND/T1)PA1
(ADC0/SGND/T0)PA0
(ICP0/INT0)PC0
(MISO/INT2)PB3
(MOSI/INT1)PB2
(SS/CKOUT)/PB0
C12
100n
dW/RESET/PA2
R5
1k
3
VREG
GND
7
6
Q2
Si1022R
(SCK)PB1
VREFGND
R20
10k
D3
BAS40L
Block Reset 5V from Master to VREG
C10
10n
PGND
VREF
BATT
ATmega16HVA-36CK1
J4
6
2
6
R6
1k
B6
D7
D6
E5
E6
E7
E3
E4
C1
C2
PACK+
RESET
C13
100n
ESD
MISO
MOSI
SCK
RESET
VREFGND
C14
100n
VREF
PGND
ISP circuit
PC0
ATMEL Norway
Vestre Rosten 79
7075 TILLER
NORWAY
Date:
Document number:
TITLE:
SB201.SchDoc
MISO
MOSI
SCK
RESET
C4
1u
R15
10k
SB201 monitoring and protection circuit for 1/2-cell Li-ion
R10
100R
17.04.2008
A08-482/A08-483
7
7
AVR455
MISO
SCK
RESET
TSM-103-01-T-DH-TR
10:13:28
1
3
5
J18
2
4
6
VREG
PGND
GND
R1
10k
PAGE:
Revision: D
D1
BAS40L
USART1W
PB0
PA1
PA0
TC_COM
VREFGND
MOSI
D2
BZB984-C5V6
7
1
8
8
of
J11
J9
J13
J14
J15
J16
1
PC0
PB0
PA1
PA0
TCOM
VGND
A
B
C
D