ATWEBDVK-02WC Atmel, ATWEBDVK-02WC Datasheet - Page 45
ATWEBDVK-02WC
Manufacturer Part Number
ATWEBDVK-02WC
Description
KIT DEV TCP/IP AT89C51RD2 WEBCAM
Manufacturer
Atmel
Series
@Webr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of ATWEBDVK-02WC
Main Purpose
*
Embedded
*
Utilized Ic / Part
AT89C51RD2
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure 13-5. PCA High Speed Output Mode
13.4
4235K–8051–05/08
Pulse Width Modulator Mode
CCAPnH
Write to
1
CCA PnL
Write to
0
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen.
Once ECOM is set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur
while modifying the compare value. Writing to CCAPnH will set ECOM. For this reason, user
software should write CCAPnL first, and then CCAPnH. Of course, the ECOM bit can still be
controlled by accessing to CCAPMn register.
All of the PCA modules can be used as PWM outputs. Figure 13-6 shows the PWM function.
The frequency of the output depends on the source for the PCA timer. All of the modules will
have the same frequency of output because they all share the PCA timer. The duty cycle of each
module is independently variable using the modules capture register CCAPLn. When the value
of the PCA CL SFR is less than the value in the modules CCAPLn SFR the output will be low,
when it is equal to or greater than the output will be high. When CL overflows from FF to 00,
CCAPLn is reloaded with the value in CCAPHn. This allows updating the PWM without glitches.
The PWM and ECOM bits in the module's CCAPMn register must be set to enable the PWM
mode.
Reset
Enable
PCA counter/timer
CCAPnH
CH
16 bit comparator
CF
ECO Mn
CCAPnL
CR
CL
CAPPn
Match
CAPNn MATn TOGn PWMn ECCFn
CCF4 CCF3 CCF2 CCF1 CCF0
AT89C51RD2/ED2
CCON
0xD8
CCAPMn, n = 0 to 4
0xDA to 0xDE
PCA IT
CEXn
45
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