V2DIP1-48 FTDI, Future Technology Devices International Ltd, V2DIP1-48 Datasheet - Page 12
![MOD MCU-USB HOST CTLR 24-DIP](/photos/28/37/283701/v2dip1-48_sml.jpg)
V2DIP1-48
Manufacturer Part Number
V2DIP1-48
Description
MOD MCU-USB HOST CTLR 24-DIP
Manufacturer
FTDI, Future Technology Devices International Ltd
Series
Vinculum-IIr
Datasheet
1.V2DIP1-48.pdf
(25 pages)
Specifications of V2DIP1-48
Main Purpose
Interface, USB 2.0 Host/Controller
Embedded
Yes, ASIC
Utilized Ic / Part
VNC2-48Q
Primary Attributes
Single A-Type Connector, UART / Parallel FIFO / SPI Interfaces
Secondary Attributes
Second USB Port is Available via Pins, Traffic LEDs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
768-1057
3.6 Serial Peripheral Interface (SPI)
The VNC2-48Q has one master module and two slave modules. These modules are described more fully in
a Vinculum-II datasheet please refer to:-
3.6.1 Signal Description - SPI Slave
The SPI Slave signals can be programmed to a choice of available I/O pins. Table 3.5 explains the
available pins for each of the SPI Slave signals.
J1-6, J1-11, J2-5, J2-10
J1-2, J1-8, J1-12, J2-9
J1-3, J1-9, J2-12, J2-8
J1-10, J2-11, J2-6
Table 3.5 - Data and Control Bus Signal Mode Options – SPI Slave
3.6.2 Signal Description - SPI Master
The SPI Master signals can be programmed to a choice of available I/O pins Table 3.6 shows the SPI
master signals and the available pins that they can be mapped.
J1-6, J1-11, J2-5, J2-10
J1-2, J1-8, J1-12, J2-9
J1-3, J1-9, J2-12, J2-8
J1-10, J2-11, J2-6
J1-6, J1-11, J2-5, J2-10
Available Pins
Available Pins
Copyright © 2010 Future Technology Devices International Limited
`
spi_m_clk
spi_m_mosi
spi_m_miso
spi_m_cs_0#
spi_m_cs_1#
spi_s0_mosi
spi_s1_mosi
spi_s0_miso
spi_s1_miso
spi_s0_ss#
spi_s1_ss#
spi_s0_clk
spi_s1_clk
FTDI
Name
Name
V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.01
website.
Input/Output
Output
Output
Output
Output
Output
Type
Input
Input
Type
Input
Active low slave select 0 from master
Active low slave select 1 from master
Synchronous data from master to
Synchronous data from master to
Document Reference No.: FT_000236
Synchronous data from slave to
Synchronous data from slave to
SPI master clock input
Master Out Slave In
Master In Slave Out
Master Out Slave In
Master In Slave Out
Slave clock input
Slave chip select
Description
Description
slave 0
slave 1
Clearance No.: FTDI# 153
master
master
slave
slave
to
to
11