EZ80L920210ZCO Zilog, EZ80L920210ZCO Datasheet - Page 25
EZ80L920210ZCO
Manufacturer Part Number
EZ80L920210ZCO
Description
KIT DEV EZ80 WEB SERVER
Manufacturer
Zilog
Series
eZ80®r
Specifications of EZ80L920210ZCO
Main Purpose
*
Embedded
*
Utilized Ic / Part
eZ80L92
Primary Attributes
*
Secondary Attributes
*
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3165
EZ80L920210ZCO
Q1370684
EZ80L920210ZCO
Q1370684
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UM012906-0103
Pin #
46
47
48
49
50
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
2. The Power and Ground nets are connected directly to the eZ80L92 device.
Additional note: external capacitive loads on RD, WR, IORQ, MREQ, D0–D7 and A0–A23 should be
below 10pF to satisfy the timing requirements for the eZ80
pulled to either V
to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80F91’s Peripheral Power-Down Register.
this table. The entire interface is represented in the eZ80L92 Module Schematics
through
66.
Symbol
RD
WR
INSTRD
BUSACK
BUSREQ
Peripheral Bus Connector Identification—JP1
DD
or GND, depending on their inactive levels to reduce power consumption and
Table 2. eZ80
Signal Direction
Bidirectional
Bidirectional
Output
Input
Input
PRELIMINARY
®
Development Platform
Pull-Up 10KΩ; Low
Pull-Up 10KΩ; Low
Active Level
Low
Low
Low
®
CPU. All unused inputs should be
eZ80L92 Development Kit
1
(Continued)
Operational Description
eZ80L92 Signal
User Manual
Yes
Yes
Yes
Yes
Yes
on pages 64
2
15
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