LMX25121065EVAL/NOPB National Semiconductor, LMX25121065EVAL/NOPB Datasheet

EVALUATION BOARD FOR LMX25121065

LMX25121065EVAL/NOPB

Manufacturer Part Number
LMX25121065EVAL/NOPB
Description
EVALUATION BOARD FOR LMX25121065
Manufacturer
National Semiconductor
Series
PLLatinum™r

Specifications of LMX25121065EVAL/NOPB

Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
LMX2512
Primary Attributes
Single Fractional-N and Integer-N PLL with VCO
Secondary Attributes
1.065GHz, CodeLoader Graphical User Interface
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LMX25121065EVAL
*LMX25121065EVAL/NOPB
LMX25121065EVAL
LMX2512LQ1065
EVALUATION BOARD OPERATING INSTRUCTIONS
National Semiconductor Corporation
Wireless Communications, RF Products Group
2900 Semiconductor Dr.
Santa Clara, CA, 95052-8090
LMX2512LQ1065FPEBI Rev 02.19.03

Related parts for LMX25121065EVAL/NOPB

LMX25121065EVAL/NOPB Summary of contents

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... LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS National Semiconductor Corporation Wireless Communications, RF Products Group 2900 Semiconductor Dr. Santa Clara, CA, 95052-8090 LMX2512LQ1065FPEBI Rev 02.19.03 ...

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Table of Contents 1 General Description.................................................................................................................. 1 2 Setup ........................................................................................................................................ 1 2.1.1 Recommended Test Equipment ................................................................................ 1 2.1.2 Connection and Setup ............................................................................................... 1 3 Measurement Considerations .................................................................................................. 2 3.1 Phase Noise Measurement ....................................................................................... 2 3.2 Loop Filter Bandwidth Measurement ......................................................................... ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 1 General Description The LMX2512 Evaluation Board simplifies evaluation of the LMX2512 Dual PLL with integrated RF VCO. The board allows for the evaluation of many RF and IF PLL performance parameters with various control ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 4. Verify that jumper blocks JP1 and JP2 contain a full compliment of shunts. JP1 connects the 5.0 V supply input (VDD_5V) to the on board regulator. additional regulator circuit and TCXO are included on ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 3.2 Loop Filter Bandwidth Measurement The loop bandwidth is the bandwidth of the closed loop PLL system definition, the frequency that makes the forward loop gain equal to zero. The spectrum analyzer ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 4 Evaluation Board and CodeLoader Configuration 4.1 CodeLoader Control Settings Table 4.1.1 summarizes the settings of the programming registers used in creating the plots in the following section. To aid in setting up the correct ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Table 4.1.1 CodeLoader Default Control Settings Control Register Name Bits/Pins Tab RF PLL Controls RF_EN OB_CRL SPUR_RDT VCO_CUR IF PLL Controls IF_EN SPI_DEF IF_FREQ IF_CUR Misc Controls OSC_FREQ RF_LD Bandwidth Controls BW_EN BW_DUR BW_CONT Program ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 4.2 IF PLL Loop Filter Parameters 0 Ω 0 Ω Kφ 36 kΩ Open 330 pF 3300 pF Figure 4.2.1 IF loop filter parameters 5 Typical Performance Measurements The LMX2512 Evaluation Board typical performance criteria ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 5.2 Typical Performance Criteria Table 5.2.1 Typical Performance Criteria RF PLL Phase Noise RF PLL Reference Spur RF PLL Lock Time IF PLL Phase Noise IF PLL Reference Spur Remark: Computer monitors and other lab ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Figure 5.3.2 RF VCO phase noise and loop bandwidth (mid channel – 1065.15 MHz) Figure 5.3.3 RF VCO phase noise and loop bandwidth (high channel – 1077.57 MHz) LMX2512LQ1065 February 19, 2003 8 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Figure 5.3.4 RF PLL negative frequency switching waveform Lock time = 500 µs Figure 5.3.5 Lock time from 1077.57 MHz to 1052.64 MHz LMX2512LQ1065 February 19, 2003 9 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Figure 5.3.6 RF PLL positive frequency switching waveform Lock time = 533 µs Figure 5.3.7 Lock time from 1052.64 MHz to 1077.57 MHz LMX2512LQ1065 February 19, 2003 10 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 5.4 IF PLL Typical Performance Measurements Figure 5.4.1 IF VCO phase noise and loop bandwidth Figure 5.4.2 IF PLL reference spurs at 120kHz offset (spur level <-91.6 dBc) LMX2512LQ1065 February 19, 2003 11 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Turn on time = 453.3 µs Figure 5.4.3 IF PLL turn on time (with CE control pin) LMX2512LQ1065 February 19, 2003 12 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS VDD_5V SMA JP1 OUT GND R30 + BYP HEADER_2X2 0 1u LP3985IM5-2.8 VDD_TCXO OPEN R1 OPEN C15 OPEN ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Evaluation Board – Build Diagram Figure B.1 Top layer (top view) LMX2512LQ1065 APPENDIX B: February 19, 2003 14 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Evaluation Board – Bill of Materials Table C.1 Bill of Materials Item QTY Part Number # C0603C470J5GAC 2 10 C0603C101J5GAC 3 1 C0603C331J5GAC 4 1 C0805C332J3GAC 5 1 C0603C103K4RAC 6 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS 17 2 HTSM3203-10G2 18 1 LMX2512LQ1065 19 1 LP3985IM5-2 LVCO-4279U 21 5 5762SF 22 7 CCIJ255G 23 1 225325GTSP 24 12 OF12SHCA 25 10 2C18PPMZZ LMX2512LQ1065 HEADER, 10 Pin JP2, uWire PLL/VCO IC ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Figure C.1 Shunt placement (top view) Note: Shunts placed on JP1 and JP2 as indicated by LMX2512LQ1065 RED lines. February 19, 2003 17 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Evaluation Board – Board Layout Figure D.1 Top layer Figure D.2 Mid layer 1 LMX2512LQ1065 APPENDIX D: February 19, 2003 18 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Figure D.3 Mid layer 2 Figure D.4 Bottom Layer LMX2512LQ1065 February 19, 2003 19 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS The port setup is necessary to tell the CodeLoader program which signals to send to which locations on the computer parallel port. The proper pin configuration for this part is shown below. The Port Address ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Figure E.3 Default Bits/Pins Setup Figure E.4 Default RF PLL Setup LMX2512LQ1065 February 19, 2003 21 ...

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LMX2512LQ1065 EVALUATION BOARD OPERATING INSTRUCTIONS Special Note: Version 2.1.3 of CodeLoader contains a known problem corrected in the next version of CodeLoader, associated with programming the RF PLL frequency. To program the RF PLL to frequencies with fractional ...

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