LMK01000EVAL National Semiconductor, LMK01000EVAL Datasheet - Page 4
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LMK01000EVAL
Manufacturer Part Number
LMK01000EVAL
Description
BOARD EVALUATION FOR LMK01000
Manufacturer
National Semiconductor
Series
PowerWise®r
Specifications of LMK01000EVAL
Main Purpose
Timing, Clock Distribution
Utilized Ic / Part
LMK01000
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
www.national.com
I
I
f
SLEW
DUTY
P
CC
CC
CLKin
CLKin
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors
for availability and specifications.
Recommended Operating Conditions
Note 1: "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 2: This device is a high performance integrated circuit with ESD handling precautions. Handling of this device should only be done at ESD protected work
stations. The device is rated to a HBM-ESD of > 2 kV, a MM-ESD of > 200 V, and a CDM-ESD of > 1.2 kV.
Package Thermal Resistance
Note 3: Specification assumes 16 thermal vias connect the die attach pad to the embedded copper plane on the 4-layer JEDEC board. These vias play a key
role in improving the thermal performance of the LLP. It is recommended that the maximum number of vias be used in the board layout.
Electrical Characteristics
(3.15 V
parametric norms at Vcc = 3.3 V, T
and are not guaranteed).
Power Supply Voltage
Input Voltage
Storage Temperature Range
Lead Temperature (solder 4 s)
Junction Temperature
Ambient Temperature
Power Supply Voltage
Symbol
PD
CLKin
CLKin
≤
Vcc
Power Supply Current
(Note
Power Down Current
CLKin Frequency Range
CLKin Frequency Input Slew Rate
CLKin Frequency Input Duty Cycle
Input Power Range for CLKin or
CLKin*
Parameter
≤
3.45 V, -40 °C
Parameter
5)
Parameter
48-Lead LLP
≤
T
A
A
= 25 °C, and at the Recommended Operation Conditions at the time of product characterization
Package
≤
85 °C, Differential Inputs/Outputs; except as specified. Typical values represent most likely
(Note
(Note
Symbol
CLKin0, CLKin0*, CLKin1, CLKin1*
V
T
(Note
CC
A
3)
4)
All outputs
enabled, no
divide or delay
( CLKoutX_MUX
= Bypassed )
Per channel, no
divide or delay
(CLKoutX_MUX
= Bypassed )
POWERDOWN = 1
(Note
f
f
AC coupled
Current Consumption
CLKin
CLKin
1,
Symbol
Note
T
V
V
T
T
≤
> 800 MHz
STG
6,
CC
IN
L
J
27.4° C/W
800 MHz
Note
2)
θ
4
JA
3.15
Min
Conditions
-40
8)
LMK01000
LMK01010
LMK01020
LVDS
LVPECL
(Includes Emitter
Resistors)
θ
J-PAD (Thermal Pad)
-0.3 to (V
5.8° C/W
Typ
3.3
25
-0.3 to 3.6
-65 to 150
Ratings
+260
125
CC
+ 0.3)
Min
0.5
-13
30
40
1
Max
3.45
85
17.8
Typ
271
160
338
40
1
1600
Max
Units
70
60
5
°C
°C
°C
V
V
Units
°C
V
Units
MHz
V/ns
dBm
mA
%