ADC14C080EB/NOPB National Semiconductor, ADC14C080EB/NOPB Datasheet
ADC14C080EB/NOPB
Specifications of ADC14C080EB/NOPB
Related parts for ADC14C080EB/NOPB
ADC14C080EB/NOPB Summary of contents
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... The ADC14C080 is available in a 32-lead LLP package and operates over the industrial temperature range of −40°C to +85°C. Connection Diagram © 2007 National Semiconductor Corporation Features ■ 1 GHz Full Power Bandwidth ■ Internal reference and sample-and-hold circuit ■ ...
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Block Diagram Ordering Information Industrial (−40°C www.national.com ≤ ≤ T +85°C) A ADC14C080CISQ ADC14C080CISQE 250-Piece Tape and Reel ADC14C080EB 2 Package 32 Pin LLP 32 Pin LLP, Evaluation Board 20209802 ...
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Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I CMO REF 12 OF/DCS DIGITAL I/O 11 CLK 30 PD Equivalent Circuit ...
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Pin No. Symbol 13-19, D0–D13 23-29 21 DRDY ANALOG POWER AGND Exposed Pad DIGITAL POWER DRGND www.national.com Equivalent Circuit Digital data output pins that make up the 14-bit ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage on Any Pin (Not to exceed 4.2V) Input Current at Any Pin other than Supply Pins (Note 4) Package Input Current (Note 4) ...
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Symbol Parameter V Internal Reference bottom RN Ext V External Reference Voltage REF ADC14C080 Dynamic Converter Electrical Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V +1.2V MHz, 50% Duty Cycle, DCS ...
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Symbol Parameter DIGITAL OUTPUT CHARACTERISTICS (D0–D13, DRDY) V Logical “1” Output Voltage OUT(1) V Logical “0” Output Voltage OUT(0) +I Output Short Circuit Source Current SC −I Output Short Circuit Sink Current SC C Digital Output Capacitance OUT POWER SUPPLY ...
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Dynamic Converter Electrical Characteristics at 65MSPS Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V +1.2V MHz, 50% Duty Cycle, DCS disabled, V CLK ≤ ≤ . All other limits apply for T ...
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Note 9: With a full scale differential input of 2V P-P Note 10: Typical figures are 25°C and represent most likely parametric norms at the time of product characterization. The typical specifications are not A guaranteed. Note ...
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Specification Definitions APERTURE DELAY is the time after the falling edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...
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Timing Diagram Transfer Characteristic FIGURE 1. Output Timing FIGURE 2. Transfer Characteristic 11 20209809 20209810 www.national.com ...
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Typical Performance Characteristics DNL, INL specifications apply: AGND = DRGND = 0V, V DCS disabled pF/pin CMO L DNL DNL vs. f DNL vs. Temperature www.national.com = +3.0V +2.5V, ...
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DNL vs 20209849 13 INL vs 20209850 www.national.com ...
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Typical Performance Characteristics AGND = DRGND = 0V +3.0V MHz pF/pin. T CMO IN L SNR, SINAD, SFDR vs. V SNR, SINAD, SFDR vs. V SNR, SINAD, SFDR ...
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SNR, SINAD, SFDR vs. Clock Duty Cycle SNR, SINAD, SFDR vs. Clock Duty Cycle, DCS Enabled SNR, SINAD, SFDR vs. f Distortion vs. Clock Duty Cycle 20209857 Distortion vs. Clock Duty Cycle, DCS Enabled 20209859 IN 20209863 15 20209858 20209860 ...
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SNR, SINAD, SFDR vs. Temperature Spectral Response @ 10 MHz input Spectral Response @ 170 MHz input www.national.com Distortion vs. Temperature 20209865 Spectral Response @ 70 MHz input 20209868 Intermodulation Distortion, f 20209870 16 20209866 20209869 1= 19.5 MHz, f ...
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Power vs. f CLK 20209872 17 www.national.com ...
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Functional Description Operating on a single +3.0V supply, the ADC14C080 uses a pipeline architecture and has error correction circuitry to help ensure maximum performance. The differential analog input signal is digitized to 14 bits. The user has the choice of ...
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− V − REF CM REF V − REF CM REF − ...
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It is important that all grounds associated with the reference voltage and the analog input signal make connection to the ground plane at a ...
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POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 0.1 µF ca- pacitor and with a 100 pF ceramic chip capacitor close to each power pin. Leadless chip capacitors are preferred because they have low series ...
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All ground connections should have a low inductance path to ground. 7.0 DYNAMIC PERFORMANCE To achieve the best dynamic performance, the clock source driving the CLK input must have ...
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Physical Dimensions inches (millimeters) unless otherwise noted 32-Lead LLP Package Ordering Numbers: ADC14C080CISQ NS Package Number SQA32A 23 www.national.com ...
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