ADC12L080EVAL National Semiconductor, ADC12L080EVAL Datasheet

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ADC12L080EVAL

Manufacturer Part Number
ADC12L080EVAL
Description
BOARD EVALUATION FOR ADC12L080
Manufacturer
National Semiconductor
Datasheet

Specifications of ADC12L080EVAL

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
80M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
425mW @ 80MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC12L080
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
© 2004 National Semiconductor Corporation
ADC12L080
12-Bit, 80 MSPS, 450 MHz Bandwidth A/D Converter with
Internal Reference
General Description
The ADC12L080 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 80 Megasamples per second (MSPS). This
converter uses a differential, pipeline architecture with digital
error correction and an on-chip sample-and-hold circuit to
minimize die size and power consumption while providing
excellent dynamic performance. The ADC12L080 can be
operated with either the internal or an external reference.
Operating on a single 3.3V power supply, this device con-
sumes just 425 mW at 80 MSPS, including the reference
current. The Power Down feature reduces power consump-
tion to just 50 mW.
The differential inputs provide a full scale input swing equal
to
ternal reference input is converted on-chip to a differential
reference for use by the processing circuitry. Output data
format may be selected as either offset binary or two’s
complement.
This device is available in the 32-lead LQFP package and
operates over the industrial temperature range of −40˚C to
+85˚C.
Connection Diagram
TRI-STATE
±
V
REF
®
is a registered trademark of National Semiconductor Corporation.
. The buffered, high impedance, single-ended ex-
DS200610
Features
n Single supply operation
n Low power consumption
n Power down mode
n Internal or external reference
n Selectable Offset Binary or 2’s Complement data format
n Pin-compatible with ADC12010, ADC12020, ADC12040,
Key Specifications
n Full Power Bandwidth
n DNL
n SNR (f
n SFDR (f
n Power Consumption, 80 MHz
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communication Receivers
n Sonar/Radar
n xDSL
n Wireless Local Loops
n Data Acquisition Systems
n DSP Front Ends
ADC12L063, ADC12L066
Operating
Power Down
IN
IN
= 10 MHz)
= 10 MHz)
20061001
±
October 2004
425 mW (typ)
www.national.com
0.4 LSB (typ)
50 mW (typ)
66 dB (typ)
80 dB (typ)
450 MHz

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ADC12L080EVAL Summary of contents

Page 1

... This device is available in the 32-lead LQFP package and operates over the industrial temperature range of −40˚C to +85˚C. Connection Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2004 National Semiconductor Corporation Features n Single supply operation n Low power consumption n Power down mode n Internal or external reference n Selectable Offset Binary or 2’ ...

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... Ordering Information Industrial (−40˚C ≤ T ADC12L080CIVY ADC12L080EVAL Block Diagram www.national.com ≤ +85˚C) Package A 32 Pin LQFP Evaluation Board 2 20061002 ...

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Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I − REF DIGITAL I/O 10 CLK Equivalent Circuit ...

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Pin Descriptions and Equivalent Circuits Pin No. Symbol 14–19, D0–D11 22–27 ANALOG POWER AGND DIGITAL POWER DGND GND www.national.com (Continued) Equivalent Circuit ...

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... Absolute Maximum Ratings (Notes Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications – – Voltage on Any Pin Input Current at Any Pin (Note 3) Package Input Current (Note 3) Package Dissipation 25˚C A ESD Susceptibility Human Body Model (Note 5) ...

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DC and Logic Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V +2.5V 0V +1.0V external, V REF Boldface limits apply for ...

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DC and Logic Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V +2.5V 0V +1.0V external, V REF Boldface limits apply for ...

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AC Electrical Characteristics Note 8: To guarantee accuracy required that |V Note 9: With the test condition for V = +1. REF Note 10: Typical figures are 25˚C, and represent most ...

Page 9

Specification Definitions APERTURE DELAY is the time after the rising edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...

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Timing Diagram Transfer Characteristic www.national.com Output Timing FIGURE 1. Transfer Characteristic 10 20061009 20061010 ...

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Typical Performance Characteristics DNL, INL V = 1.0V external 1.65V, f REF CM CLK DNL DNL vs. f CLK DNL vs. Clock Duty Cycle MHz unless otherwise stated. IN 20061041 20061042 20061043 ...

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Typical Performance Characteristics DNL, INL V = 1.0V external 1.65V, f REF CM DNL vs. Temperature DNL vs www.national.com = 80 MHz unless otherwise stated. (Continued) CLK IN 20061044 20061070 ...

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Typical Performance Characteristics V = 1.65V MHz MHz, unless otherwise stated. CM CLK IN SNR,SINAD,SFDR vs. V SNR,SINAD,SFDR vs. V SNR,SINAD,SFDR vs 3.3V 20061049 DR ...

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Typical Performance Characteristics V = 1.65V MHz MHz, unless otherwise stated. (Continued) CM CLK IN SNR,SINAD,SFDR vs. f SNR,SINAD,SFDR vs. Clock Duty Cycle SNR,SINAD,SFDR vs. V www.national.com 3.3V ...

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Typical Performance Characteristics V = 1.65V MHz MHz, unless otherwise stated. (Continued) CM CLK IN SNR,SINAD,SFDR vs. f SNR,SINAD,SFDR vs. Temperature t vs 3.3V ...

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Typical Performance Characteristics V = 1.65V MHz MHz, unless otherwise stated. (Continued) CM CLK IN Spectral Response @ 40 MHz Input Spectral Response @ 150 MHz Input www.national.com 3.3V, V ...

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Functional Description Operating on a single +3.3V supply, the ADC12L080 uses a pipeline architecture with error correction circuitry to help ensure maximum performance. Differential analog input signals are digitized to 12 bits. Each analog input signal should have a peak-to-peak ...

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Applications Information The full scale error in LSB for a sine wave input can be described as approximately E = 4096 ( 1 - sin (90˚ + dev)) FS Where dev is the angular difference between the two signals having ...

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Applications Information 3.3 PD The PD pin, when high, holds the ADC12L080 in a power- down mode to conserve power when the converter is not being used. The power consumption in this state and is not affected ...

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Applications Information FIGURE 6. Driving the Signal Inputs with a Transformer www.national.com (Continued) FIGURE 5. Differential Drive Circuit of Figure 4 20 20061014 20061015 ...

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Applications Information 5.0 POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 10 µF capacitor and with a 0.1 µF low ESL ceramic chip capacitor within 3 millimeters of each power pin the case with ...

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Applications Information tween the converter’s input pins and ground or to the refer- ence input pin and ground should be connected to a very clean point in the ground plane. Figure 7 gives an example of a suitable layout. All ...

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... BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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