ADC12DC105LFEB/NOPB National Semiconductor, ADC12DC105LFEB/NOPB Datasheet

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ADC12DC105LFEB/NOPB

Manufacturer Part Number
ADC12DC105LFEB/NOPB
Description
EVAL BOARD FOR ADC12DC105
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of ADC12DC105LFEB/NOPB

Number Of Adc's
2
Number Of Bits
12
Sampling Rate (per Second)
105M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
800mW @ 105MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC12DC105
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2008 National Semiconductor Corporation
ADC12DC105
Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs
General Description
The ADC12DC105 is a high-performance CMOS analog-to-
digital converter capable of converting two analog input sig-
nals into 12-bit digital words at rates up to 105 Mega Samples
Per Second (MSPS). These converters use a differential,
pipelined architecture with digital error correction and an on-
chip sample-and-hold circuit to minimize power consumption
and the external component count, while providing excellent
dynamic performance. A unique sample-and-hold stage
yields a full-power bandwidth of 1 GHz. The AD-
C12DC080/105 may be operated from a single +3.0V or
+3.3V power supply. A power-down feature reduces the pow-
er consumption to very low levels while still allowing fast
wake-up time to full operation. The differential inputs provide
a 2V full scale differential input swing. A stable 1.2V internal
voltage reference is provided, or the ADC12DC105 can be
operated with an external 1.2V reference. Output data format
(offset binary versus 2's complement) and duty cycle stabi-
lizer are pin-selectable. The duty cycle stabilizer maintains
performance over a wide range of clock duty cycles.
The ADC12DC105 is available in a 60-lead LLP package and
operates over the industrial temperature range of −40°C to
+85°C.
Block Diagram
300739
Features
Key Specifications
Applications
Internal sample-and-hold circuit and precision reference
Low power consumption
Clock Duty Cycle Stabilizer
Single +3.0V or +3.3V supply operation
Power-down mode
Offset binary or 2's complement output data format
60-pin LLP package, (9x9x0.8mm, 0.5mm pin-pitch)
Resolution
Conversion Rate
SNR (f
SFDR (f
Full Power Bandwidth
Power Consumption
High IF Sampling Receivers
Wireless Base Station Receivers
Test and Measurement Equipment
Communications Instrumentation
Portable Instrumentation
IN
IN
= 170 MHz)
= 170 MHz)
30073902
690 mW (typ), V
800 mW (typ), V
October 23, 2008
69 dBFS (typ)
83 dBFS (typ)
www.national.com
1 GHz (typ)
105 MSPS
A
A
12 Bits
=3.0V
=3.3V

Related parts for ADC12DC105LFEB/NOPB

ADC12DC105LFEB/NOPB Summary of contents

Page 1

... The ADC12DC105 is available in a 60-lead LLP package and operates over the industrial temperature range of −40°C to +85°C. Block Diagram © 2008 National Semiconductor Corporation Features ■ Internal sample-and-hold circuit and precision reference ■ ...

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Connection Diagram Ordering Information Industrial (−40°C ADC12DC105CISQ ADC12DC105CISQE ADC12DC105LFEB www.national.com ≤ ≤ T +85° 30073901 Package 60 Pin LLP 60 Pin LLP, 250 pc. Tape and Reel Evaluation Board ...

Page 3

Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I CMO 9 V ...

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Pin No. Symbol 42-49, DA0-DA7, 52-55 DA8-DA11 23-24, DB0-DB1, 27-36 DB3-DB11 39 DRDY ANALOG POWER 8, 16, 17, 58 12, 15, AGND Exposed Pad DIGITAL POWER V 26, 38,50 DR 25, 37, 51 DRGND www.national.com ...

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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage on Any Pin (Not to exceed 4.2V) Input Current at Any Pin other than Supply Pins (Note 4) Package Input Current (Note 4) ...

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Symbol Parameter Internal Reference Accuracy EXTV External Reference Voltage REF Dynamic Converter Electrical Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V +1.2V 105 MHz CLK CM CMO . All ...

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Logic and Power Supply Electrical Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V +1.2V 105 MHz CLK CM CMO . All other limits apply for T = ...

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Timing and AC Characteristics Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V +1.2V 105 MHz CLK CM CMO the signal amplitude. Boldface limits apply for T Symb Parameter Maximum Clock ...

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Specification Definitions APERTURE DELAY is the time after the falling edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...

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Timing Diagrams Transfer Characteristic www.national.com FIGURE 1. Output Timing FIGURE 2. Transfer Characteristic 10 30073909 30073910 ...

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Typical Performance Characteristics DNL, INL specifications apply: AGND = DRGND = 0V, V DCS disabled 25°C. CM CMO A DNL Unless otherwise specified, the following = +3.3V +2.5V, Internal V = +1.2V, ...

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Typical Performance Characteristics AGND = DRGND = 0V +3.3V 170 MHz 25°C. CMO IN A SNR, SINAD, SFDR vs. V SNR, SINAD, SFDR vs. Clock Duty Cycle, f SNR, SINAD, ...

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SNR and SFDR vs 30073978 Spectral Response @ 10 MHz Input 30073968 Spectral Response @ 170 MHz Input 30073970 POWER vs. f CLK Spectral Response @ 70 MHz Input IMD MHz ...

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Functional Description Operating on a single +3.0V or +3.3V supply, the AD- C12DC105 digitizes two differential analog input signals to 12 bits, using a differential pipelined architecture with error cor- rection circuitry and an on-chip sample-and-hold circuit to ensure maximum ...

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− V − REF CM REF V − REF CM REF − ...

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SFDR and/or SNR. V may be loaded to 1mA for CMO use as a temperature stable 1.5V reference. The remaining pins should not be loaded. Smaller capacitor values than those ...

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17 www.national.com ...

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POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 0.1 µF ca- pacitor and with a 100 pF ceramic chip capacitor close to each power pin. Leadless chip capacitors are preferred because they have low series ...

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Physical Dimensions inches (millimeters) unless otherwise noted TOP View...............................SIDE View...............................BOTTOM View 60-Lead LLP Package Ordering Number: ADC12DC105CISQ NS Package Number SQA60A 19 www.national.com ...

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... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock Conditioners www.national.com/timing Data Converters www.national.com/adc Displays www.national.com/displays Ethernet www.national.com/ethernet Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www ...

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