IRAC1166-100W International Rectifier, IRAC1166-100W Datasheet - Page 7

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IRAC1166-100W

Manufacturer Part Number
IRAC1166-100W
Description
BOARD DEMO 100W FOR IR1166
Manufacturer
International Rectifier
Datasheets

Specifications of IRAC1166-100W

Main Purpose
AC/DC, Secondary Side
Outputs And Type
1, Isolated
Power - Output
100W
Voltage - Output
16V
Current - Output
6.25A
Voltage - Input
90 ~ 264VAC
Regulator Topology
Flyback
Board Type
Fully Populated
Utilized Ic / Part
IR1166S, IRF7853
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Switching
-
3.0 CIRCUIT DESCRIPTION
The PCB design is basically optimized as a test platform to evaluate of active rectification
using Smart synchronous rectification and as well as basic features of flyback converter
operating in quasi-resonant mode.
This demo board has 2-pin connector ( CON1 ) for AC input and a time-lag type 3.5A fuse
for input current overload protection. Minimum input filtering is provided (Cp1-Xcap) before
AC input voltage (90-264VAC) is routed to a 6Amp-bridge rectifier (DB1).
Primary side controller (U2) basically drives the primary Mosfet Q1 to operate in Critical-
Conduction mode to eliminate turn-ON switching loss thru ZVS (zero voltage switching only
occurs when NVsec > Vdcin ) or thru LVS ( low-voltage switching when nVsec< Vdcin) to
reduce capacitive losses of Q1 especially at high line condition. The switching frequency F
sw
at full load varies from ~38 to ~76kHz typically from low to high input condition and falls back
to minimum value (fixed ~ 6 -10kHz) to reduce input power during light load condition.
Auxiliary winding is loosely monitored by demagnetization pin4 of U2 through Dp3, Rp5 and
Rp11 network that sets the OVP limit with Rp6 and Rp11 sets the over power limit of the
converter.
Resonant capacitor Cp7 is added to augment the overall parasitic winding capacitance and
the primary mosfet Q1’s Coss to achieve ZVS and LVS at low and high input line condition
respectively.
Optocoupler U3 provides isolated output voltage feedback to the primary side. The output
voltage level across load connector CON2 (+16Vo) is monitored and regulated by the V/I
Secondary error amplifier U4 (AQ105 or AS4305) that also manages the output current
limiting function by monitoring the voltage across the RS25-26 current sense resistors.
The power stage of the secondary is using 2-SO8 low IRF7853 synch-fets (SR) in parallel to
implement the low-side synchronous rectification. In this configuration, it is simpler to derive
the Vcc supply for the U1 (IR1166 SO8-IC) controller directly from the DC output Vout.
Jumper J5 is used to isolate U1’s Vcc from Vout so that user may easily evaluate IC’s power
consumption especially during standby load condition. In the absence of a sensitive low
current probe, the quiescent current Icc through Dp4 can be calculated from the differential
voltage across the Rs17. The decoupling capacitor Cs17 and Cs18 provides additional
filtering which is necessary to clean high frequency noise especially when U1 is driving
several mosfets (SR1 // SR2) with high Qg parameters normally associated with high current-
low voltage mosfets.
The Vd and Vs sense pins monitor the voltage (Vsd) across the sync rect mosfets and proper
attention was taken during PCB routing to ensure the integrity of differential voltage Vsd. This
is done by directly taking the signal Vd from the drain pins of SR1//SR2 using a dedicated
trace.
Probe points as well as redundant test hook points are provided to facilitate easy probing of
essential test waveforms.
Rev.1A
18 August 2006
RD#0618
Page 7 of 24
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
http://www.irf.com/ Data and specifications subject to change without notice.

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