LM3370SD-3021EV National Semiconductor, LM3370SD-3021EV Datasheet - Page 17

• Manufacturer Part Number: LM3370SD-3021EV
• Description: BOARD EVALUATION LM3370SD-3021
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM3370SD-3021EV

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 2, Non-Isolated
• Voltage - Output: 1.2V, 3.3V
• Current - Output: 600mA, 600mA
• Voltage - Input: 2.7 ~ 5.5V
• Regulator Topology: Buck
• Frequency - Switching: 2MHz
• Board Type: Fully Populated
• Utilized Ic / Part: LM3370
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Power - Output: -

TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with
the most significant bit (MSB) being transferred first. The
number of bytes that can be transmitted per transfer is unre-
stricted. Each byte of data has to be followed by an acknowl-
edge bit. The acknowledge related clock pulse is generated
by the master. The transmitter releases the SDA line (HIGH)
during the acknowledge clock pulse. The receiver must pull
down the SDA line during the 9th clock pulse, signifying an
I
W = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by either master or slave)
rs = repeated startxx=36h
However, if a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in the read
cycle waveform.
I
2
2
C Compatible Write Cycle
C Compatible Read Cycle
17
acknowledge. A receiver which has been addressed must
generate an acknowledge after each byte has been received.
After the START condition, I
This address is seven bits long followed by an eighth bit which
is a data direction bit (R/W). For the eighth bit, a “0” indicates
a WRITE and a “1” indicates a READ. The second byte se-
lects the register to which the data will be written. The third
byte contains data to write to the selected register.
2
C master sends a chip address.
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