LM5033SD-EVAL National Semiconductor, LM5033SD-EVAL Datasheet - Page 3

• Manufacturer Part Number: LM5033SD-EVAL
• Description: BOARD EVALUATION LM5033SD
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM5033SD-EVAL

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 9V
• Current - Output: 20A
• Voltage - Input: 40 ~ 60V
• Regulator Topology: Buck
• Frequency - Switching: 315kHz
• Board Type: Fully Populated
• Utilized Ic / Part: LM5033
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Power - Output: -
• Lead Free Status / Rohs Status: Not Compliant

Primary Side Operation
flows out of C3/C4 through T2, T1’s primary, and Q2 to
ground. The LM5033’s guaranteed deadtime ensures Q1
and Q2 are never on simultaneously.
Secondary Side Operation
When Q1 is on, T1’s pin 6 is high relative to pins 8 and 10.
Q3 is on since its gate is pulled up to between 6V and 9.5V
(depending on V
pin 10 to be within 60 mV of ground. The load current flows
from T1’s pin 8 through L2, the load, and through Q3 to pin
10. Since pin 10 is effectively at ground Q4 is off, and no
current flows out of T1’s pin 6 (except for a small amount
through Q6 and R18). During the next half cycle, when Q2 is
on, T1’s pin 10 is high relative to pins 8 and 6, Q4 provides
the return path for the load current, and Q3 is off.
During the deadtime when both Q3 and Q4 are off, the load
current’s return path is through their body diodes. The gate
voltage at Q3 and Q4 is limited by Q6 and Q7, respectively,
to )1.5V below that at Z2’s cathode.
UVLO/OVLO Operation
When V
9.6V at V
tors U2 and U3 which have open collector outputs. With V
below the UVLO threshold U2A and U3A outputs are low,
grounding the Softstart pin and disabling the LM5033 out-
puts. When V
outputs open, releasing the Softstart pin and allowing the
voltage across C14 to ramp up. When the Softstart pin
voltage exceeds 1.0V the LM5033 outputs become active.
When V
switch low, disabling the LM5033 outputs.
When V
(OVLO) at 63V both U2B and U3A outputs switch low,
grounding the Softstart pin and disabling the LM5033 out-
puts. As V
IN
IN
IN
CC
exceeds 13V the LM5033 is fully biased, providing
IN
is reduced below 33V U2A and U3A outputs
and 2.5V at the REF pin. V
exceeds the over-voltage lockout threshold
is reduced below 61.5V both U2B and U3A
IN
IN
is increased past 37V both U2A and U3A
and the load current) through Q6, causing
CC
(Continued)
powers compara-
FIGURE 3. Current Limit Operation
IN
3
outputs open releasing the Softstart pin. When the Softstart
pin voltage exceeds 1.0V the LM5033 outputs become ac-
tive.
V
While the LM5033 internally generates 9.6V at V
internal regulator is used only during start-up and when the
LM5033 is shut down by the On/Off input or the UVLO/OVLO
circuit. When the LM5033 outputs are enabled, the voltage
from T1’s auxiliary winding (Pins 1, 5) is regulated to 10.3V
by Z1 and Q5. This voltage powers the V
within the LM5033, the reference voltage at pin 2, the
LM5100’s V+ pin, and the two dual comparators (U2, U3).
The LM5033’s internal V
power dissipation.
Current Limit Operation
The current out of T2’s secondary is 1% of the primary
current. The voltage across R7 is therefore proportional to
the load current reflected through T1, and is provided to the
LM5033’s CS pin via the R8/C13 filter. When the load current
exceeds )23A the voltage at CS will exceed 0.5V causing
the LM5033 to disable its outputs, and internally ground the
Softstart pin. When the softstart capacitor is fully discharged
and the voltage at CS has fallen below 0.5V the Softstart pin
is internally released. The Softstart voltage initially rises
slowly due to the parallel combination of C14 and C20
(U3B’s output is low). After )10 ms, when the softstart
voltage reaches 1.0V, the LM5033 outputs become active
and C20 is effectively removed (U3B’s open collector output
opens). The Softstart voltage then rises rapidly, determined
by C14. If the overload condition is still present the above
sequence repeats when the current limit threshold is again
reached. SeeFigure 3.
The addition of C20 and U3B lengthens the off-time between
retries in a current limit situation, reducing the on-time/off-
time ratio. The result is lower average input current and a
lower temperature rise in the circuit components
CC
CC
regulator is shut off, reducing its
20107703
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requirements
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