LM5035EVAL National Semiconductor, LM5035EVAL Datasheet

LM5035EVAL

Manufacturer Part Number

LM5035EVAL

Description

BOARD EVALUATION LM5035

Manufacturer

National Semiconductor

Series

PowerWise®r

Datasheets

1.LM5035SQNOPB.pdf (28 pages)

2.LM5035EVAL.pdf (13 pages)

Specifications of LM5035EVAL

Main Purpose

DC/DC, Step Down

Outputs And Type

1, Isolated

Voltage - Output

3.3V

Current - Output

30A

Voltage - Input

36 ~ 75V

Regulator Topology

Buck

Frequency - Switching

400kHz

Board Type

Fully Populated

Utilized Ic / Part

LM5035

Lead Free Status / RoHS Status

Not applicable / Not applicable

Power - Output

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LM5035 Evaluation Board

Introduction

The LM5035 evaluation board is designed to provide the

design engineer with a fully functional power converter

based on the Half Bridge topology to evaluate the LM5035

controller. The evaluation board is provided in an industry

standard quarter-brick footprint.

The performance of the evaluation board is as follows:

• Input operating range: 36V to 75V

• Output voltage: 3.3V

• Output current: 0 to 30A

• Measured efficiency: 89% at 30A, 92% at 15A

• Frequency of operation: 400kHz

• Board size: 2.28 x 1.45 x 0.5 inches

• Load Regulation: 0.2%

• Line Regulation: 0.1%

• Line UVLO (33.9V/31.9V on/off)

• Line OVP (79.4V/78.3V off/on)

• Hiccup current limit

The printed circuit board consists of 6 layers; 2 ounce copper

outer layers and 3 ounce copper inner layers on FR4 mate-

rial with a total thickness of 0.062 inches. The unit is de-

signed for continuous operation at rated load at

minimum airflow of 200 CFM.

Theory of Operation

Power converters based on the Half Bridge topology offer

high efficiency and good power handling capability in appli-

cations up to 500 Watts. The operation of the transformer

causes the flux to swing in both directions, thereby better

utilizing the magnetic core.

AN201773

40˚C and a

National Semiconductor

Application Note 1435

Steve Schulte

January 2006

The Half Bridge converter is derived from the Buck topology

family, employing separate high voltage (HO) and low volt-

age (LO) modulating power switches with independent pulse

width timing. The main difference between the topologies

are, the Half Bridge topology employs a transformer to pro-

vide input / output ground isolation and a step down or step

up function.

Each cycle, the main primary switch turns on and applies

one-half the input voltage across the primary winding, which

has 8 turns. The transformer secondary has 2 turns, leading

to a 4:1 step-down of the input voltage. For an output voltage

of 3.3V the composite duty cycle (D) of the primary switches

varies from approximately 75% (low line) to 35% (high line).

The secondary employs synchronous rectification controlled

by the LM5035. During soft-start, the sync FET body diodes

act as the secondary rectifiers until the main transformer

energizes the gate drivers. The DLY resistor programs the

non-overlap timing for the sync FETs to maximize efficiency

while eliminating shoot through current.

Feedback from the output is processed by an amplifier and

reference, generating an error voltage, which is coupled

back to the primary side control through an optocoupler. The

COMP input to the LM5035 greatly increases the achievable

loop bandwidth. The capacitance effect (and associated

pole) of the optocoupler is reduced by holding the voltage

across the optocoupler constant. The LM5035 voltage mode

controller pulse width modulates the error signal with a ramp

signal derived from the line voltage (feedforwarding) to re-

duce the response time to input voltage changes. A standard

“type III” network is used for the compensator.

The evaluation board can be synchronized to an external

clock with a recommended frequency range of 420KHz to

500KHz.

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LM5035EVAL Summary of contents

Page 1

... Watts. The operation of the transformer causes the flux to swing in both directions, thereby better utilizing the magnetic core. © 2006 National Semiconductor Corporation National Semiconductor Application Note 1435 Steve Schulte January 2006 ...

Page 2

Theory of Operation Powering and Loading Considerations When applying power to the LM5035 evaluation board cer- tain precautions need to be followed. A misconnection can damage the assembly. Proper Connections When operated at low input voltages the evaluation board can ...

Page 3

Powering Up (Continued) impedance referred to earlier. The interaction of the source supply folding back and the evaluation board going into undervoltage shutdown will start an oscillation, or chatter, that may have undesirable consequences. A quick efficiency check is the ...

Page 4

Performance Characteristics TURN-ON WAVEFORMS When applying power to the LM5035 evaluation board a certain sequence of events occurs. Soft-start capacitor val- ues and other components allow for a minimal output voltage for a short time until the feedback loop can ...

Page 5

Performance Characteristics (Continued) Conditions: Input Voltage = 72VDC Output Current = 5A Trace 1: Q2 drain voltage Volts/div = 10V Horizontal Resolution = 1µs/div FIGURE 5. Conditions: Input Voltage = 48VDC Output Current = 5A Upper Trace: SR1, Q4 gate ...

Page 6

www.national.com 6 ...

Page 7

DESIGNATOR QTY PART NUMBER BR1 1 BAT54BRW C1,22 2 C2012X7R1C225K C2,31,33,36 4 C1608X7R1H104K C4532X7R1H685M C7 1 C2012X7R1H334K 6TPE220MI C11 - 14 4 C3216X5R0J226M C15 C0805C471M5RAC C17 C2012X7R2A104K C18 ...

Page 8

DESIGNATOR QTY PART NUMBER R33 1 CRCW06031472F R34 1 CRCW06032002F T1 1 DA2025- P8208 T3,4 2 SM76924 U1 1 LM5035MH U2 1 LM5110- LM8261M5 U4 1 PS2811- LM4041AIM3-1 CMPZ4694 Z2 1 CMPZ4698 ...

Page 9

PCB Layouts Top Side Bottom Side 9 20177310 20177311 www.national.com ...

Page 10

PCB Layouts (Continued) www.national.com Layer 1 Layer 2 10 20177312 20177313 ...

Page 11

PCB Layouts (Continued) Layer 3 Layer 4 11 20177314 20177315 www.national.com ...

Page 12

PCB Layouts (Continued) www.national.com Layer 5 Layer 6 12 20177316 20177317 ...

Page 13

... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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