© 2006 National Semiconductor Corporation
LM2642 Evaluation Board
Introduction
The LM2642 evaluation board has been developed to aid in
the design and evaluation of dc/dc converters based on the
LM2642 controller IC. As shown in Figure 1, the evaluation
board is configured to provide two outputs of 2.5V/2A and
1.8V/2A from an input range of 4.5V to 20V. The correspond-
ing bill of materials is given in Table 1. Figure 2 and Figure 3
show the evaluation board layout.
Optional Components
The evaluation board provides several optional component
pads for flexibility in changing components.
Please refer to the LM2642 product datasheet for more
information regarding device operation and component se-
lection.
In switching power supplies, the rapid increase of drain
current in the top FET coupled with parasitic inductance will
generate unwanted L∆i/∆t noise spikes at the source node of
the FET (SWx node) and also at the VIN node.
The resistor in series with the SWx pin (R6, R11) slows down
the gate drive (HDRVx), thus slowing the rise and fall time of
the top FET, yielding a longer drain current transition time
and reducing switch node ringing. Top FET switching losses
will increase with higher resistance values. Small resistors
(1-5 ohms) can also be placed in series with the CBOOTx
pin (R7, R12). A CBOOT resistor will slow the rise time of the
FET, to reduce switch node ringing.
AN200474
National Semiconductor
Application Note 1239
Allan Fisher
March 2006
To maintain stable regulation, the FBx pins should remain
free of noise. The LM2642 evaluation board has components
C15 and C22 installed to suppress noise that may be picked
up by the FBx traces. Notice that both of these capacitors
are placed physically close to the FBx nodes. Pads C17 and
C23 are provided for additional output capacitors.
Powering Up
Before powering up the LM2642 evaluation board, all exter-
nal connections should be verified. The power supply input
must be turned off and connected with proper polarity to the
VIN post, also marked as P1. The channel 1 and channel 2
loads should be connected at the Vout posts, marked as P2
and P3. Any type of load is acceptable up to 2A. The load
can be on or off at startup. Output voltage can be monitored
with a DVM or oscilloscope by connecting probes to the Vout
posts, P2 and P3. The GND posts are provided primarily for
scope probe ground connections. The PGOOD signal can be
monitored with a scope probe or DVM at the PGOOD test
pin.
Once all connections have been verified, input power can be
applied. The input voltage must be set between 4.5V and
20V. The enable switches for each channel, ON1 and ON2,
can be used to turn on the evaluation board once the input
power is on. Each channel may be enabled or disabled
independently. The switches may also be left on for enabling
the evaluation board directly from the power supply input.
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