MAX17000EVKIT+ Maxim Integrated Products, MAX17000EVKIT+ Datasheet - Page 29

• Manufacturer Part Number: MAX17000EVKIT+
• Description: KIT EVAL FOR MAX17000
• Manufacturer: Maxim Integrated Products

Specifications of MAX17000EVKIT+

• Main Purpose: Special Purpose DC/DC, DDR Memory Supply
• Outputs And Type: 3, Non-Isolated
• Power - Output: 19.8W
• Voltage - Output: 1.8V, 0.9V, 0.9V
• Current - Output: 10A, 2A, 3mA
• Voltage - Input: 7 ~ 20V
• Regulator Topology: Buck
• Frequency - Switching: 300kHz
• Board Type: Fully Populated
• Utilized Ic / Part: MAX17000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Since the gain bandwidth is also determined by the
transconductance of the output FETs, which increases
with load current, the output capacitor might need to be
greater than 20µF if the load current exceeds 1.5A, but
can be smaller than 20µF if the maximum load current
is less than 1.5A. As a guideline, choose the minimum
capacitance and maximum ESR for the output capaci-
tor using the following:
C
dropout operation:
R
frequency given by approximately:
Once these conditions for stability are met, additional
capacitors, including those of electrolytic and tantalum
types, can be connected in parallel to the ceramic
capacitor (if desired) to further suppress noise or volt-
age ripple at the output.
The VTTR buffer is a scaled-down version of the VTT
regulator, with much smaller output transconductance.
Its compensation capacitor can, therefore, be smaller
and its ESR larger than what is required for its larger
counterpart. For typical applications requiring load cur-
rent up to ±4mA, a ceramic capacitor with a minimum
value of 0.33µF is recommended (R
Connect this capacitor between VTTR and the analog
ground plane.
Power loss in the MAX17000 is the sum of the losses of
the PWM block, the VTT LDO block, and the VTTR ref-
erence buffer:
ESR
OUT
value is measured at the unity-gain-bandwidth
needs to be increased by a factor of 2 for low-
PD PWM
(
PD VTTR
VTTR Output Capacitor Selection
C
R
PD VTT
(
OUT MIN
ESR MAX
)
f
GBW
=
(
I
______________________________________________________________________________________
_
BIAS
_
)
)
=
=
=
3
C
×
2
=
=
mA
36
OUT
5
A
20
5
V
×
m
×
=
µ
0 9
Ω
×
0 9
F
.
40
.
×
×
Complete DDR2 and DDR3 Memory
V
Power Dissipation
mA
V
I
LOAD
1 5 .
=
I
I
LOAD
=
LOAD
1 5
1 5
1 8
×
.
.
A
.
2 7
5
.
A
A
W
V
mW
ESR
=
0 2
.
< 0.3Ω).
W
Power-Management Solution
The 2W total power dissipation is within the 24-pin
TQFN multilayer board power dissipation spec of
2.22W. The typical application does not source or sink
continuous high currents. VTT current is typically
100mA to 200mA in the steady state. VTTR is down in
the µA range, though the Intel spec requires 3mA for
DDR1 and 1mA for DDR2. True worst-case power dissi-
pation occurs on an output short-circuit condition with
worst-case current limit. The MAX17000 does not
employ any foldback current limiting, and relies on the
internal thermal shutdown for protection. Both the VTT
and VTTR output stages are powered from the same
VTTI input. Their output voltages are referenced to the
same REFIN input. The value of the VTTI bypass capac-
itor is chosen to limit the amount of ripple/noise at VTTI,
or the amount of voltage dip during a load transient.
Typically, VTTI is connected to the output of the buck
regulator, which already has a large bulk capacitor.
The boost capacitors (C
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1µF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1µF. For these applications,
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
where Q
high-side MOSFET’s data sheet. For example, assume
the FDS6612A n-channel MOSFET is used on the high
side. According to the manufacturer’s data sheet, a sin-
gle FDS6612A has a maximum gate charge of 13nC
(V
boost capacitance would be:
Selecting the closest standard value, this example
requires a 0.1µF ceramic capacitor.
GS
= 5V). Using the above equation, the required
GATE
is the total gate charge specified in the
C
BST
C
PD Total
=
BST
200
(
13
BST
nC
=
mV
Q
200
) = 2
) must be selected large
GATE
=
mV
0 065
W
Boost Capacitors
.
µF
29