MAX17007EVKIT+ Maxim Integrated Products, MAX17007EVKIT+ Datasheet - Page 32

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MAX17007EVKIT+

Manufacturer Part Number
MAX17007EVKIT+
Description
KIT EVAL FOR MAX17007
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r

Specifications of MAX17007EVKIT+

Main Purpose
DC/DC, Step Down
Outputs And Type
2, Non-Isolated
Voltage - Output
1.2V, 1.5V
Current - Output
12A, 12A
Voltage - Input
7 ~ 24V
Regulator Topology
Buck
Frequency - Switching
270kHz, 330kHz
Board Type
Fully Populated
Utilized Ic / Part
MAX17007
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Calculating the power dissipation in high-side MOSFET
(N
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold voltage,
source inductance, and PCB layout characteristics. The
following switching-loss calculation provides only a
very rough estimate and is no substitute for breadboard
evaluation, preferably including verification using a
thermocouple mounted on N
where C
Q
FET, and I
rent (2.4A typ).
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied due to the squared term in the C x
V
MOSFET chosen for adequate R
voltages becomes extraordinarily hot when biased from
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, you can “over design” the
circuit to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good size heatsink to handle the overload
power dissipation.
Dual and Combinable QPWM Graphics
Core Controllers for Notebook Computers
32
LOAD(MAX)
IN
IN(MAX)
G(SW)
H
PD NL
2
) due to switching losses is difficult since it must
______________________________________________________________________________________
PD NHSwitching
(
x f
(
SW
I
VALLEY(MAX)
is the charge needed to turn on the N
OSS
LOAD
Re
, consider choosing another MOSFET with
GATE
, but are not quite high enough to exceed
sistive
switching-loss equation. If the high-side
is the N
=
=
I
is the peak gate-drive source/sink cur-
VALLEY MAX
I
VALLEY MAX
)
=
)
=
1
H
is the maximum valley current
V
(
+
MOSFET’s output capacitance,
IN MAX LOAD SW
(
C
V
(
IN MAX
OSS
V
)
OUT
H
(
)
+
:
L
)
+
V V
I
), the worst-case power
IN MAX
I
LOAD MAX
)
(
DS(ON)
2
I
INDUCTOR
(
f
I
LOAD
2
(
)
2
2
f
⎛ ⎛
SW
Q
at low battery
I
GATE
)
)
G SW
LIR
2
(
R
DS ON
H
)
(
MOS-
)
Choose a Schottky diode (D
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. Select a
diode that can handle the load current during the dead
times. This diode is optional and can be removed if effi-
ciency is not critical.
The boost capacitors (C
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1µF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1µF. For these applications,
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
where N is the number of high-side MOSFETs used for
one regulator, and Q
in the MOSFET’s data sheet. For example, assume (2)
IRF7811W n-channel MOSFETs are used on the high
side. According to the manufacturer’s data sheet, a sin-
gle IRF7811W has a maximum gate charge of 24nC
(V
boost capacitance would be:
Selecting the closest standard value, this example
requires a 0.22µF ceramic capacitor.
The output-voltage adjustable range for continuous-
conduction operation is restricted by the nonadjustable
minimum off-time one-shot. For best dropout perfor-
mance, use the slower (200kHz) on-time settings. When
working with low input voltages, the duty-factor limit
must be calculated using worst-case values for on- and
off-times. Manufacturing tolerances and internal propa-
gation delays introduce an error to the on-times. This
error is greater at higher frequencies. Also, keep in
mind that transient response performance of buck reg-
ulators operated too close to dropout is poor, and bulk
output capacitance must often be added (see the
Transient Response section (the V
Quick-PWM Design Procedure section).
GS
= 5V). Using the above equation, the required
Minimum Input Voltage Requirements
C
Applications Information
BST
C
BST
=
GATE
and Dropout Performance
2 24
200
=
×
BST
N Q
is the gate charge specified
mV
×
200
nC
) must be selected large
L
) with a forward voltage
GATE
mV
=
Boost Capacitors
0 24
.
SAG
µ
F
equation) in the

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