DAC124S085EB/NOPB National Semiconductor, DAC124S085EB/NOPB Datasheet - Page 6
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DAC124S085EB/NOPB
Manufacturer Part Number
DAC124S085EB/NOPB
Description
BOARD EVALUATION DAC124S085
Manufacturer
National Semiconductor
Series
PowerWise®r
Specifications of DAC124S085EB/NOPB
Number Of Dac's
4
Number Of Bits
12
Outputs And Type
4, Single Ended
Data Interface
Serial
Settling Time
6µs
Dac Type
Voltage
Voltage Supply Source
Single
Operating Temperature
-40°C ~ 105°C
Utilized Ic / Part
DAC124S085
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DAC124S085EB
4.0 Functional Description
Table 1 describes the function of the various jumpers
on the DAC124S085 evaluation board. The Evaluation
Board schematic is shown in Figure 6.
4.1 Serial Interface
In Stand-Alone Mode, the serial interface must be
driven by an external device. The three-wire interface
(SCLK, SYNC, D
MICROWIRE, as well as most DSPs. See the Timing
Diagram (Figure 2) for information on a write sequence.
The maximum digital input level of the three-wire
interface is independent of the analog supply voltage
(V
regardless of V
A write sequence begins by bringing the SYNC line low.
Once SYNC is low, the Binary data on the D
clocked into the 16-bit serial input register on the falling
edges of SCLK. On the 16th falling clock edge, the last
data bit is clocked in and the programmed function (a
change in the mode of operation and/or a change in the
DAC register contents) is executed. At this point the
Jumper
A
).
1 & 2
3 & 4
5 & 6
7 & 8
JP1
JP2
Pin
The range of all digital inputs is 0V to 5.25V
Table 1: Jumper Configurations
Select VA=5.5V
from WV4.1 Board
Select 2kΩ Output
Select 2kΩ Output
Load Resistance
Load Resistance
Select 2.5V as
A
Select 200pF
Select 200pF
Output Load
Capacitance
Output Load
Capacitance
.
Pins 1 & 2
VOUT_A
VOUT_A
VOUT_B
VOUT_B
IN
) is compatible with SPI, QSPI and
V
JP3
REF
Select VA_REMOTE
Select 2kΩ Output
Select 2kΩ Output
Select VA as V
Load Resistance
Load Resistance
Select 200pF
Select 200pF
Capacitance
Capacitance
Output Load
Output Load
Pins 2 & 3
VOUT_C
VOUT_C
VOUT_D
VOUT_D
from J1
JP4
IN
REF
line is
6
SYNC line may be kept low or brought high. In either
case, it must be brought high for the minimum specified
time before the next write sequence as a falling edge of
SYNC will initiate the next write cycle.
Since the SYNC and D
when they are high, they should be idled low between
write sequences to minimize power consumption.
Please refer to the DAC124S085 datasheet for more
information.
4.2 DAC Reference Circuitry
The reference voltage for the DAC124S085 is selected
by JP2. (See Table 1 for details.) The reference can
either be selected as a fixed 2.5 volts, or as the supply
voltage. In the latter case, the analog output range of
the DAC124S085 can be scaled by adjusting the
supply voltage (V
from +2.7V to +5.5V.
4.3 Analog Output
The analog output of this Eval board is available DC
coupled at the header J6. An AC coupled output is not
provided, however SMA footprints are available at J2
and J4. These footprints can be used along with the
prototype field to design another output circuit, should it
be desired.
4.4 Power Supply Connections
In Stand-alone mode, the DAC124S085 board must be
powered by an external supply.
Connect a DC voltage supply to connector J1 and
place a jumper across pins 2 and 3 of JP1 to select
V
from +2.7V to +5.5V.
If the supply voltage (V
the DAC124S085, ensure a clean power supply is
used.
6.0 Evaluation Board Specifications
Board Size:
Power Requirements
Max Clock Frequency:
Analog Output
A
_REMOTE. This voltage (V
Impedance:
A
). This voltage can be set anywhere
Min: +2.7V , 3mA
40 MHz
User Selectable: 2KΩ, 200pF, or ∞.
3.70" x 3.15" (9.4 cm x 8 cm)
A
IN
) serves as the reference for
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buffers draw more current
A
) can be set anywhere
Max: +5.5V, 5 mA