LP38859-1.2EVAL National Semiconductor, LP38859-1.2EVAL Datasheet - Page 11

• Manufacturer Part Number: LP38859-1.2EVAL
• Description: BOARD EVALUATION LP38859-1.2
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LP38859-1.2EVAL

• Channels Per Ic: 1 - Single
• Voltage - Output: 1.2V
• Current - Output: 3A
• Voltage - Input: 3 ~ 5.5V
• Regulator Type: Positive Fixed
• Operating Temperature: -40°C ~ 125°C
• Board Type: Fully Populated
• Utilized Ic / Part: LP38859
• Lead Free Status / RoHS Status: Not applicable / Not applicable

ical), the C
lack of sufficient biasing to the control circuitry.
Since V
will cause V
nA (about 10 MΩ) through C
imately 0.1% lower than nominal, while a leakage of 500 nA
(about 1 MΩ) will cause V
than nominal. Typical ceramic capacitors will have a factor of
10X difference in leakage between 25°C and 85°C, so the
maximum ambient temperature must be included in the ca-
pacitor selection process.
Typical C
providing typical Soft-Start times in the range of 70 μs to 7 ms
(5τ). Values less than 1 nF can be used, but the Soft-Start
effect will be minimal. Values larger than 100 nF will provide
soft-start, but may not be fully discharged if V
the UVLO threshold to less than 500 mV in less than 100 µs.
Figure 1 shows the relationship between the C
a typical C
The C
back to the device ground pin. No components, other than
C
adverse effects to V
If the Soft-Start function is not needed the SS pin should be
left open, although some minimal capacitance value is always
recommended.
POWER DISSIPATION AND HEAT-SINKING
Additional copper area for heat-sinking may be required de-
pending on the maximum device dissipation (P
maximum anticipated ambient temperature (T
vice. Under all possible conditions, the junction temperature
must be within the range specified under operating condi-
tions.
The total power dissipation of the device is the sum of three
different points of dissipation in the device.
The first part is the power that is dissipated in the NMOS pass
element, and can be determined with the formula:
SS
, should be connected to the SS pin, as there could be
SS
REF
capacitor must be connected to a clean ground path
SS
FIGURE 1. Typical C
SS
SS
appears on the SS pin, any leakage through C
REF
values will be in the range of 1 nF to 100 nF,
P
value.
discharge circuit will cease to function due to a
D(PASS)
to fall, and thus affect V
OUT
= (V
.
IN
OUT
- V
SS
to be approximately 1% lower
OUT
will cause V
SS
) × I
vs C
OUT
OUT
OUT
OUT
. A leakage of 50
Values
BIAS
OUT
A
to be approx-
20131223
) for the de-
D
value and
) and the
falls from
(2)
SS
11
The second part is the power that is dissipated in the bias and
control circuitry, and can be determined with the formula:
where I
of the device that is related to V
The third part is the power that is dissipated in portions of the
output stage circuitry, and can be determined with the formu-
la:
where I
of the device that is related to V
The total power dissipation is then:
The maximum allowable junction temperature rise (ΔT
pends on the maximum anticipated ambient temperature
(T
junction temperature (T
The maximum allowable value for junction to ambient Ther-
mal Resistance, θ
Heat-Sinking The TO-220 Package
The TO220-5 package has a θ
rating of 3°C/W. These ratings are for the package only, no
additional heat-sinking, and with no airflow. If the needed
θ
then no additional heat-sinking is required since the package
can safely dissipate the heat and not exceed the operating
T
heat-sinking is needed.
The thermal resistance of a TO-220 package can be reduced
by attaching it to a heat sink or a copper plane on a PC board.
If a copper plane is to be used, the values of θ
as shown in next section for TO-263 package.
The heat-sink to be used in the application should have a
heat-sink to ambient thermal resistance, θ
where θ
junction to the ambient air, θ
the case to the surface of the heart-sink, and θ
resistance from the junction to the surface of the case.
For this equation, θ
The value for θ
tor, etc. θ
heat-sink manufacturer datasheet for details and recommen-
dations.
JA
J(MAX)
A
) for the application, and the maximum allowable operating
, as calculated above, is greater than or equal to 60°C/W
. If the needed θ
GND(BIAS)
GND(IN)
JA
CH
is the required total thermal resistance from the
P
varies between 1.5°C/W to 2.5°C/W. Consult the
D
P
is the portion of the operating ground current
= P
CH
D(BIAS)
is the portion of the operating ground current
P
JA
depends on method of attachment, insula-
D(PASS)
D(IN)
JC
, can be calculated using the formula:
= V
is about 3°C/W for a TO-220 package.
= V
JA
J(MAX)
BIAS
+ P
is less than 60°C/W then additional
IN
CH
× I
) .
D(BIAS)
× I
JA
is the thermal resistance from
GND(IN)
BIAS
IN
GND(BIAS)
.
rating of 60°C/W and a θ
.
+ P
D(IN)
HA
:
JC
JA
is the thermal
will be same
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J
) de-
(3)
(4)
(5)
(6)
(7)
(8)
JC