LMV831MGEVAL National Semiconductor, LMV831MGEVAL Datasheet

LMV831MGEVAL

Manufacturer Part Number

LMV831MGEVAL

Description

BOARD EVAL FOR LMV831 3.3MHZ OA

Manufacturer

National Semiconductor

Series

PowerWise®r

Datasheets

1.LMV831MGEVAL.pdf (20 pages)

2.LMV831MGEVAL.pdf (8 pages)

Specifications of LMV831MGEVAL

Channels Per Ic

1 - Single

Amplifier Type

General Purpose

Output Type

Single-Ended

Slew Rate

2 V/µs

Current - Output / Channel

66mA

Operating Temperature

-40°C ~ 125°C

Current - Supply (main Ic)

250µA

Voltage - Supply, Single/dual (±)

2.7 V ~ 5.5 V

Board Type

Fully Populated

Utilized Ic / Part

LMV831

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

-3db Bandwidth

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EMIRR Evaluation Boards

for LMV831/LMV832/

LMV834

General Description

To demonstrate the EMI robustness of the LMV831/LMV832/

LMV834 and to be able to measure the parameter EMIRR,

three evaluation boards have been developed; one for each

device. This document describes the evaluation boards and

explains how to perform EMIRR measurements. Focus is on

one of the input pins as those are most sensitive to EMI.

Based on symmetry considerations, it can be expected that

both inputs have the same EMIRR. For reasons of simplicity

of the required schematic the measurement on the IN+ pin is

selected. A detailed description on EMI and EMIRR for the

other pins can be found in Application Note AN-1698.

To identify EMI robust op amps, a parameter is defined that

quantitatively describes the EMI performance. A quantitative

measure enables the comparison and the ranking of op amps

on their EMI robustness. The definition of the parameter

EMIRR is given by:

where V

RF signal (V) and ΔV

voltage shift (V).

Op Amp Configuration

To have best defined RF levels on the pin under test, no op

amp feedback elements should be in the RF signal path.

Therefore, the op amp is connected in an unity-gain configu-

ration. This yields the lowest level of RF filtering due to a

feedback network. Schematics and layouts are included in

this document.

Applying the RF Signal

Care needs to be taken in applying the RF signal to the pin

under test. Signals up to a few GHz will be used, so the whole

RF signal path needs to match the characteristic impedance

of the RF generator. This requires proper coaxial cabling from

the generator to the test board. On the test board a 50Ω

stripline needs to be used to bring the RF signal as close as

possible to the pin under test. In this case the stripline can be

connected directly from the connector to the IN+ pin. A 50Ω

termination at the pin under test is also required. For symme-

try reasons this is done with two 100Ω resistors in parallel,

one on each side of the strip line. Setting up the test environ-

ment with a 50Ω resistor close to the LMV831/LMV832/

LMV834 ensures that the RF levels at the pin under test are

well defined. This 50Ω resistor is also used to set the bias

RF_PEAK

is the amplitude of the applied unmodulated

is the resulting input-referred offset

300685

30068502

National Semiconductor

Application Note 1867

Gerrit de Wagt

October 3, 2008

level of the IN+ pin to ground level. The DC measurements

are taken at the output of the op amp. Since the op amp is in

the unity gain configuration, the input referred offset voltage

shift corresponds one-to-one to the measured output voltage

shift.

Isolating the Other Pins

When the pin under test is tested, the other pins need to be

decoupled for RF signals. This ensures that the obtained off-

set voltage shift is dominantly a result of coupling the RF

signal to the pin under test. For this decoupling standard SMD

components can be used.

Layout Considerations

The layout of the evaluation board requires some attention.

For decoupling the supply lines it is suggested that 10 nF ca-

pacitors be placed as close as possible to the op amp. For

single supply, place a capacitor between V

supplies, place one capacitor between V

ground, and a second capacitor between ground and V

the LMV831 evaluation board, the decoupling of the negative

pin V

is done for easy routing and to keep connections to the pins

short. Even with the LMV831/LMV832/LMV834's inherent

hardening against EMI, it is still recommended to keep the

input traces short and as far as possible from RF sources.

Then the RF signals entering the chip are as low as possible,

and the remaining EMI can be, almost, completely eliminated

in the chip by the EMI reducing features of the LMV831/

LMV832/LMV834.

Measurement Procedure

The measurement procedure is the same for all test circuits.

To measure the input referred offset voltage shift needed for

calculating the EMIRR, the following procedure can be used:

Measure V

Translate measured V

voltages. Translation is one-to-one in this case since the

gain is one in the IN+ test setup.

Subtract the two measured input referred voltages.

Verify if the offset shift is above the noise level of the

op amp setup and the op amp is not saturated. If this is

not the case choose another RF level and start the

procedure again.

Calculate the EMIRR.

If needed, transform the results to an EMIRR based on

a 100 mV

−

is implemented by a capacitor between V

OUT

RF signal.

when the RF signal is off.

when the RF signal is on.

OUT

voltages to input referred

and V

and the board

www.national.com

and V

−

. For dual

−

. This

−

. On

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LMV831MGEVAL Summary of contents

Page 1

... Setting up the test environ- ment with a 50Ω resistor close to the LMV831/LMV832/ LMV834 ensures that the RF levels at the pin under test are well defined. This 50Ω resistor is also used to set the bias © 2008 National Semiconductor Corporation National Semiconductor Application Note 1867 Gerrit de Wagt October 3, 2008 level of the IN+ pin to ground level ...

Page 2

LMV831 Evaluation Board FIGURE 1. Schematic for LMV831, Coupling RF Signal to the IN+ Pin www.national.com 30068501 FIGURE 2. Layout for LMV831, All Layers FIGURE 3. Layout for LMV831, Silk Screen 2 30068512 30068514 ...

Page 3

LMV832 Evaluation Board FIGURE 4. Schematic for LMV832, Coupling RF Signal to the IN+ Pin FIGURE 5. Layout for LMV832, All Layers FIGURE 6. Layout for LMV832, Silk Screen 3 30068504 30068515 30068516 www.national.com ...

Page 4

LMV834 Evaluation Board FIGURE 7. Schematic for LMV834, Coupling RF Signal to the IN+ Pin FIGURE 8. Layout for LMV834, All Layers www.national.com 30068517 FIGURE 9. Layout for LMV834, Silk Screen 4 30068507 30068518 ...

Page 5

Measurement Results To show the sensitivity of the IN+ pin two types of measure- ment results are presented using the LMV831 evaluation board: • The EMIRR as a function of the frequency of the applied signal. The level of the ...

Page 6

The Bill of Materials (BOM) of the LMV834 evaluation board is given in the table below. Designator Description C1, C3 0603 Capacitor C2, C4 Case_B Capacitor 10 µF C5, C6, C7, C8 0603 Capacitor P1 Connector P2 Connector P3 Connector ...

Page 7

7 www.national.com ...

Page 8

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