STEVAL-MKI029V1 STMicroelectronics, STEVAL-MKI029V1 Datasheet - Page 21
![BOARD DEMO STM8S207R6/LIS331DLH](/photos/28/40/284023/steval-mki029v1_sml.jpg)
STEVAL-MKI029V1
Manufacturer Part Number
STEVAL-MKI029V1
Description
BOARD DEMO STM8S207R6/LIS331DLH
Manufacturer
STMicroelectronics
Series
MEMSr
Datasheets
1.STEVAL-MKI009V1.pdf
(42 pages)
2.STEVAL-MKI022V1.pdf
(38 pages)
3.STEVAL-MKI030V1.pdf
(105 pages)
4.STEVAL-MKI029V1.pdf
(4 pages)
Specifications of STEVAL-MKI029V1
Sensor Type
Accelerometer, 3 Axis
Sensing Range
±2g, 4g, 8g
Interface
I²C, SCI
Sensitivity
3.9mg/digit, 2mg/digit, 1mg/digit
Voltage - Supply
4.5V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
LIS331DLH, STM8S207R6T6
Sensing Axis
Double Axis
Operating Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8851
- STEVAL-MKI009V1 PDF datasheet
- STEVAL-MKI022V1 PDF datasheet #2
- STEVAL-MKI030V1 PDF datasheet #3
- STEVAL-MKI029V1 PDF datasheet #4
- Current page: 21 of 105
- Download datasheet (729Kb)
STM8S207xx, STM8S208xx
4.14.3
Asynchronous communication (UART mode)
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LIN master capability
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LIN slave mode
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SPI
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Full duplex communication - NRZ standard format (mark/space)
Programmable transmit and receive baud rates up to 1 Mbit/s (f
following any standard baud rate regardless of the input frequency
Separate enable bits for transmitter and receiver
Two receiver wakeup modes:
–
–
Transmission error detection with interrupt generation
Parity control
Emission: Generates 13-bit synch break frame
Reception: Detects 11-bit break frame
Autonomous header handling - one single interrupt per valid message header
Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
Synch delimiter checking
11-bit LIN synch break detection - break detection always active
Parity check on the LIN identifier field
LIN error management
Hot plugging support
Maximum speed: 10 Mbit/s (f
Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave/master selection input pin
Address bit (MSB)
Idle line (interrupt)
Doc ID 14733 Rev 11
MASTER
/2) both for master and slave
CPU
/16) and capable of
Product overview
21/105
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